-#include "vl.h"
-
-#define BIOS_FILENAME "mips_bios.bin"
-//#define BIOS_FILENAME "system.bin"
-#define KERNEL_LOAD_ADDR 0x80010000
-#define INITRD_LOAD_ADDR 0x80800000
-
-extern FILE *logfile;
-
-static PITState *pit;
-
-static void pic_irq_request(void *opaque, int level)
+/*
+ * QEMU/MIPS pseudo-board
+ *
+ * emulates a simple machine with ISA-like bus.
+ * ISA IO space mapped to the 0x14000000 (PHYS) and
+ * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
+ * All peripherial devices are attached to this "bus" with
+ * the standard PC ISA addresses.
+*/
+#include "hw.h"
+#include "mips.h"
+#include "pc.h"
+#include "isa.h"
+#include "net.h"
+#include "sysemu.h"
+#include "boards.h"
+#include "flash.h"
+#include "qemu-log.h"
+#include "mips-bios.h"
+
+#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
+
+#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
+
+#define MAX_IDE_BUS 2
+
+static const int ide_iobase[2] = { 0x1f0, 0x170 };
+static const int ide_iobase2[2] = { 0x3f6, 0x376 };
+static const int ide_irq[2] = { 14, 15 };
+
+static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
+static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
+
+static PITState *pit; /* PIT i8254 */
+
+/* i8254 PIT is attached to the IRQ0 at PIC i8259 */
+
+static struct _loaderparams {
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+} loaderparams;
+
+static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
+ uint32_t val)
{
- CPUState *env = first_cpu;
- if (level) {
- env->CP0_Cause |= 0x00000400;
- cpu_interrupt(env, CPU_INTERRUPT_HARD);
- } else {
- env->CP0_Cause &= ~0x00000400;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
- }
+ if ((addr & 0xffff) == 0 && val == 42)
+ qemu_system_reset_request ();
+ else if ((addr & 0xffff) == 4 && val == 42)
+ qemu_system_shutdown_request ();
}
-void cpu_mips_irqctrl_init (void)
+static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
{
+ return 0;
}
-uint32_t cpu_mips_get_random (CPUState *env)
-{
- uint32_t now = qemu_get_clock(vm_clock);
-
- return now % (MIPS_TLB_NB - env->CP0_Wired) + env->CP0_Wired;
-}
+static CPUWriteMemoryFunc *mips_qemu_write[] = {
+ &mips_qemu_writel,
+ &mips_qemu_writel,
+ &mips_qemu_writel,
+};
-/* MIPS R4K timer */
-uint32_t cpu_mips_get_count (CPUState *env)
-{
- return env->CP0_Count +
- (uint32_t)muldiv64(qemu_get_clock(vm_clock),
- 100 * 1000 * 1000, ticks_per_sec);
-}
+static CPUReadMemoryFunc *mips_qemu_read[] = {
+ &mips_qemu_readl,
+ &mips_qemu_readl,
+ &mips_qemu_readl,
+};
-static void cpu_mips_update_count (CPUState *env, uint32_t count,
- uint32_t compare)
-{
- uint64_t now, next;
- uint32_t tmp;
-
- tmp = count;
- if (count == compare)
- tmp++;
- now = qemu_get_clock(vm_clock);
- next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
- if (next == now)
- next++;
-#if 0
- if (logfile) {
- fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
- __func__, now, count, compare, next - now);
- }
-#endif
- /* Store new count and compare registers */
- env->CP0_Compare = compare;
- env->CP0_Count =
- count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec);
- /* Adjust timer */
- qemu_mod_timer(env->timer, next);
-}
+static int mips_qemu_iomemtype = 0;
-void cpu_mips_store_count (CPUState *env, uint32_t value)
+static void load_kernel (CPUState *env)
{
- cpu_mips_update_count(env, value, env->CP0_Compare);
-}
+ int64_t entry, kernel_low, kernel_high;
+ long kernel_size, initrd_size;
+ ram_addr_t initrd_offset;
+ int ret;
-void cpu_mips_store_compare (CPUState *env, uint32_t value)
-{
- cpu_mips_update_count(env, cpu_mips_get_count(env), value);
- env->CP0_Cause &= ~0x00008000;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
-}
+ kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
+ (uint64_t *)&entry, (uint64_t *)&kernel_low,
+ (uint64_t *)&kernel_high);
+ if (kernel_size >= 0) {
+ if ((entry & ~0x7fffffffULL) == 0x80000000)
+ entry = (int32_t)entry;
+ env->active_tc.PC = entry;
+ } else {
+ fprintf(stderr, "qemu: could not load kernel '%s'\n",
+ loaderparams.kernel_filename);
+ exit(1);
+ }
-static void mips_timer_cb (void *opaque)
-{
- CPUState *env;
+ /* load initrd */
+ initrd_size = 0;
+ initrd_offset = 0;
+ if (loaderparams.initrd_filename) {
+ initrd_size = get_image_size (loaderparams.initrd_filename);
+ if (initrd_size > 0) {
+ initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
+ if (initrd_offset + initrd_size > ram_size) {
+ fprintf(stderr,
+ "qemu: memory too small for initial ram disk '%s'\n",
+ loaderparams.initrd_filename);
+ exit(1);
+ }
+ initrd_size = load_image_targphys(loaderparams.initrd_filename,
+ initrd_offset,
+ ram_size - initrd_offset);
+ }
+ if (initrd_size == (target_ulong) -1) {
+ fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+ loaderparams.initrd_filename);
+ exit(1);
+ }
+ }
- env = opaque;
-#if 0
- if (logfile) {
- fprintf(logfile, "%s\n", __func__);
+ /* Store command line. */
+ if (initrd_size > 0) {
+ char buf[64];
+ ret = snprintf(buf, 64, "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
+ PHYS_TO_VIRT((uint32_t)initrd_offset),
+ initrd_size);
+ cpu_physical_memory_write((16 << 20) - 256, (void *)buf, 64);
+ } else {
+ ret = 0;
}
-#endif
- cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
- env->CP0_Cause |= 0x00008000;
- cpu_interrupt(env, CPU_INTERRUPT_HARD);
-}
+ pstrcpy_targphys((16 << 20) - 256 + ret, 256,
+ loaderparams.kernel_cmdline);
-void cpu_mips_clock_init (CPUState *env)
-{
- env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
- env->CP0_Compare = 0;
- cpu_mips_update_count(env, 1, 0);
+ stl_phys((16 << 20) - 260, 0x12345678);
+ stl_phys((16 << 20) - 264, ram_size);
}
-static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void main_cpu_reset(void *opaque)
{
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
-#endif
- cpu_outb(NULL, addr & 0xffff, value);
-}
+ CPUState *env = opaque;
+ cpu_reset(env);
-static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
-{
- uint32_t ret = cpu_inb(NULL, addr & 0xffff);
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
-#endif
- return ret;
+ if (loaderparams.kernel_filename)
+ load_kernel (env);
}
-static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
+static const int sector_len = 32 * 1024;
+static
+void mips_r4k_init (ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename, const char *cpu_model)
{
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
-#endif
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
+ char *filename;
+ ram_addr_t ram_offset;
+ ram_addr_t bios_offset;
+ int bios_size;
+ CPUState *env;
+ RTCState *rtc_state;
+ int i;
+ qemu_irq *i8259;
+ int index;
+ BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+
+ /* init CPUs */
+ if (cpu_model == NULL) {
+#ifdef TARGET_MIPS64
+ cpu_model = "R4000";
+#else
+ cpu_model = "24Kf";
#endif
- cpu_outw(NULL, addr & 0xffff, value);
-}
+ }
+ env = cpu_init(cpu_model);
+ if (!env) {
+ fprintf(stderr, "Unable to find CPU definition\n");
+ exit(1);
+ }
+ qemu_register_reset(main_cpu_reset, 0, env);
-static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
-{
- uint32_t ret = cpu_inw(NULL, addr & 0xffff);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap16(ret);
-#endif
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
-#endif
- return ret;
-}
+ /* allocate RAM */
+ if (ram_size > (256 << 20)) {
+ fprintf(stderr,
+ "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
+ ((unsigned int)ram_size / (1 << 20)));
+ exit(1);
+ }
+ ram_offset = qemu_ram_alloc(ram_size);
-static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
-{
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
-#endif
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
- cpu_outl(NULL, addr & 0xffff, value);
-}
+ cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
-static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
-{
- uint32_t ret = cpu_inl(NULL, addr & 0xffff);
+ if (!mips_qemu_iomemtype) {
+ mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
+ mips_qemu_write, NULL);
+ }
+ cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
+
+ /* Try to load a BIOS image. If this fails, we continue regardless,
+ but initialize the hardware ourselves. When a kernel gets
+ preloaded we also initialize the hardware, since the BIOS wasn't
+ run. */
+ if (bios_name == NULL)
+ bios_name = BIOS_FILENAME;
+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+ if (filename) {
+ bios_size = get_image_size(filename);
+ } else {
+ bios_size = -1;
+ }
+ if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
+ bios_offset = qemu_ram_alloc(BIOS_SIZE);
+ cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
+ bios_offset | IO_MEM_ROM);
+
+ load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
+ } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {
+ uint32_t mips_rom = 0x00400000;
+ bios_offset = qemu_ram_alloc(mips_rom);
+ if (!pflash_cfi01_register(0x1fc00000, bios_offset,
+ drives_table[index].bdrv, sector_len, mips_rom / sector_len,
+ 4, 0, 0, 0, 0)) {
+ fprintf(stderr, "qemu: Error registering flash memory.\n");
+ }
+ }
+ else {
+ /* not fatal */
+ fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
+ bios_name);
+ }
+ if (filename) {
+ qemu_free(filename);
+ }
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap32(ret);
-#endif
-#if 0
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
-#endif
- return ret;
-}
+ if (kernel_filename) {
+ loaderparams.ram_size = ram_size;
+ loaderparams.kernel_filename = kernel_filename;
+ loaderparams.kernel_cmdline = kernel_cmdline;
+ loaderparams.initrd_filename = initrd_filename;
+ load_kernel (env);
+ }
-CPUWriteMemoryFunc *io_write[] = {
- &io_writeb,
- &io_writew,
- &io_writel,
-};
+ /* Init CPU internal devices */
+ cpu_mips_irq_init_cpu(env);
+ cpu_mips_clock_init(env);
-CPUReadMemoryFunc *io_read[] = {
- &io_readb,
- &io_readw,
- &io_readl,
-};
+ /* The PIC is attached to the MIPS CPU INT0 pin */
+ i8259 = i8259_init(env->irq[2]);
-void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename, int snapshot,
- const char *kernel_filename, const char *kernel_cmdline,
- const char *initrd_filename)
-{
- char buf[1024];
- target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
- unsigned long bios_offset;
- int io_memory;
- int linux_boot;
- int ret;
- CPUState *env;
+ rtc_state = rtc_init(0x70, i8259[8], 2000);
- printf("%s: start\n", __func__);
- linux_boot = (kernel_filename != NULL);
+ /* Register 64 KB of ISA IO space at 0x14000000 */
+ isa_mmio_init(0x14000000, 0x00010000);
+ isa_mem_base = 0x10000000;
- env = cpu_init();
- register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
+ pit = pit_init(0x40, i8259[0]);
- /* allocate RAM */
- cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
- bios_offset = ram_size + vga_ram_size;
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
- printf("%s: load BIOS '%s' size %d\n", __func__, buf, BIOS_SIZE);
- ret = load_image(buf, phys_ram_base + bios_offset);
- if (ret != BIOS_SIZE) {
- fprintf(stderr, "qemu: could not load MIPS bios '%s'\n", buf);
- exit(1);
- }
- cpu_register_physical_memory((uint32_t)(0x1fc00000),
- BIOS_SIZE, bios_offset | IO_MEM_ROM);
-#if 0
- memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE);
- env->PC = 0x80010004;
-#else
- env->PC = 0xBFC00004;
-#endif
- if (linux_boot) {
- kernel_base = KERNEL_LOAD_ADDR;
- /* now we can load the kernel */
- kernel_size = load_image(kernel_filename,
- phys_ram_base + (kernel_base - 0x80000000));
- if (kernel_size == (target_ulong) -1) {
- fprintf(stderr, "qemu: could not load kernel '%s'\n",
- kernel_filename);
- exit(1);
- }
- /* load initrd */
- if (initrd_filename) {
- initrd_base = INITRD_LOAD_ADDR;
- initrd_size = load_image(initrd_filename,
- phys_ram_base + initrd_base);
- if (initrd_size == (target_ulong) -1) {
- fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
- initrd_filename);
- exit(1);
- }
- } else {
- initrd_base = 0;
- initrd_size = 0;
+ for(i = 0; i < MAX_SERIAL_PORTS; i++) {
+ if (serial_hds[i]) {
+ serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
+ serial_hds[i]);
}
- env->PC = KERNEL_LOAD_ADDR;
- /* Store command line. */
- strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
- /* FIXME: little endian support */
- *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
- *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
- } else {
- kernel_base = 0;
- kernel_size = 0;
- initrd_base = 0;
- initrd_size = 0;
}
- /* Init internal devices */
- cpu_mips_clock_init(env);
- cpu_mips_irqctrl_init();
+ isa_vga_init();
- /* Register 64 KB of ISA IO space at 0x14000000 */
- io_memory = cpu_register_io_memory(0, io_read, io_write, NULL);
- cpu_register_physical_memory(0x14000000, 0x00010000, io_memory);
- isa_mem_base = 0x10000000;
+ if (nd_table[0].vlan)
+ isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
- isa_pic = pic_init(pic_irq_request, env);
- pit = pit_init(0x40, 0);
- serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
- vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
- vga_ram_size, 0, 0);
-
- if (nd_table[0].vlan) {
- if (nd_table[0].model == NULL
- || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
- isa_ne2000_init(0x300, 9, &nd_table[0]);
- } else {
- fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
- exit (1);
- }
+ if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
+ fprintf(stderr, "qemu: too many IDE bus\n");
+ exit(1);
+ }
+
+ for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
+ index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
+ if (index != -1)
+ hd[i] = drives_table[index].bdrv;
+ else
+ hd[i] = NULL;
}
+
+ for(i = 0; i < MAX_IDE_BUS; i++)
+ isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
+ hd[MAX_IDE_DEVS * i],
+ hd[MAX_IDE_DEVS * i + 1]);
+
+ i8042_init(i8259[1], i8259[12], 0x60);
}
-QEMUMachine mips_machine = {
- "mips",
- "mips r4k platform",
- mips_r4k_init,
+static QEMUMachine mips_machine = {
+ .name = "mips",
+ .desc = "mips r4k platform",
+ .init = mips_r4k_init,
};
+
+static void mips_machine_init(void)
+{
+ qemu_register_machine(&mips_machine);
+}
+
+machine_init(mips_machine_init);
projects / qemu.git / blobdiff