s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_SPARC)
- s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
- s.info.mach = bfd_mach_sparc_v9b;
-#endif
#elif defined(TARGET_PPC)
if ((flags >> 16) & 1) {
s.info.endian = BFD_ENDIAN_LITTLE;
}
s.info.disassembler_options = (char *)"any";
s.info.print_insn = print_insn_ppc;
-#elif defined(TARGET_M68K)
- s.info.print_insn = print_insn_m68k;
-#elif defined(TARGET_MIPS)
-#ifdef TARGET_WORDS_BIGENDIAN
- s.info.print_insn = print_insn_big_mips;
-#else
- s.info.print_insn = print_insn_little_mips;
-#endif
-#elif defined(TARGET_SH4)
- s.info.mach = bfd_mach_sh4;
- s.info.print_insn = print_insn_sh;
-#elif defined(TARGET_ALPHA)
- s.info.mach = bfd_mach_alpha_ev6;
- s.info.print_insn = print_insn_alpha;
-#elif defined(TARGET_LM32)
- s.info.mach = bfd_mach_lm32;
- s.info.print_insn = print_insn_lm32;
#endif
if (s.info.print_insn == NULL) {
s.info.print_insn = print_insn_od_target;
s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_ALPHA)
- s.info.print_insn = print_insn_alpha;
-#elif defined(TARGET_SPARC)
- s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
- s.info.mach = bfd_mach_sparc_v9b;
-#endif
#elif defined(TARGET_PPC)
if (flags & 0xFFFF) {
/* If we have a precise definition of the instruction set, use it. */
s.info.endian = BFD_ENDIAN_LITTLE;
}
s.info.print_insn = print_insn_ppc;
-#elif defined(TARGET_M68K)
- s.info.print_insn = print_insn_m68k;
-#elif defined(TARGET_MIPS)
-#ifdef TARGET_WORDS_BIGENDIAN
- s.info.print_insn = print_insn_big_mips;
-#else
- s.info.print_insn = print_insn_little_mips;
-#endif
-#elif defined(TARGET_SH4)
- s.info.mach = bfd_mach_sh4;
- s.info.print_insn = print_insn_sh;
-#elif defined(TARGET_LM32)
- s.info.mach = bfd_mach_lm32;
- s.info.print_insn = print_insn_lm32;
#endif
if (!s.info.print_insn) {
monitor_printf(mon, "0x" TARGET_FMT_lx