usb: uhci: remote wakeup support.

[qemu.git] / hw / stellaris.c

diff --git a/hw/stellaris.c b/hw/stellaris.c
index 3fd9300e4850482196dd84380b1064843912e13e..b90327305ae601d3981bbd694b8deca3acd0fc99 100644 (file)
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -140,7 +140,7 @@ static void gptm_tick(void *opaque)
     gptm_update_irq(s);
 }
 
-static uint32_t gptm_read(void *opaque, a_target_phys_addr offset)
+static uint32_t gptm_read(void *opaque, target_phys_addr_t offset)
 {
     gptm_state *s = (gptm_state *)opaque;
 
@@ -188,7 +188,7 @@ static uint32_t gptm_read(void *opaque, a_target_phys_addr offset)
     }
 }
 
-static void gptm_write(void *opaque, a_target_phys_addr offset, uint32_t value)
+static void gptm_write(void *opaque, target_phys_addr_t offset, uint32_t value)
 {
     gptm_state *s = (gptm_state *)opaque;
     uint32_t oldval;
@@ -348,13 +348,15 @@ static int stellaris_gptm_init(SysBusDevice *dev)
     qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);
 
     iomemtype = cpu_register_io_memory(gptm_readfn,
-                                       gptm_writefn, s);
+                                       gptm_writefn, s,
+                                       DEVICE_NATIVE_ENDIAN);
     sysbus_init_mmio(dev, 0x1000, iomemtype);
 
     s->opaque[0] = s->opaque[1] = s;
     s->timer[0] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[0]);
     s->timer[1] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[1]);
-    register_savevm("stellaris_gptm", -1, 1, gptm_save, gptm_load, s);
+    register_savevm(&dev->qdev, "stellaris_gptm", -1, 1,
+                    gptm_save, gptm_load, s);
     return 0;
 }
 
@@ -422,7 +424,7 @@ static uint32_t pllcfg_fury[16] = {
     0xb11c /* 8.192 Mhz */
 };
 
-static uint32_t ssys_read(void *opaque, a_target_phys_addr offset)
+static uint32_t ssys_read(void *opaque, target_phys_addr_t offset)
 {
     ssys_state *s = (ssys_state *)opaque;
 
@@ -508,7 +510,7 @@ static void ssys_calculate_system_clock(ssys_state *s)
     system_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1);
 }
 
-static void ssys_write(void *opaque, a_target_phys_addr offset, uint32_t value)
+static void ssys_write(void *opaque, target_phys_addr_t offset, uint32_t value)
 {
     ssys_state *s = (ssys_state *)opaque;
 
@@ -670,10 +672,11 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
     s->user1 = macaddr[3] | (macaddr[4] << 8) | (macaddr[5] << 16);
 
     iomemtype = cpu_register_io_memory(ssys_readfn,
-                                       ssys_writefn, s);
+                                       ssys_writefn, s,
+                                       DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(base, 0x00001000, iomemtype);
     ssys_reset(s);
-    register_savevm("stellaris_sys", -1, 1, ssys_save, ssys_load, s);
+    register_savevm(NULL, "stellaris_sys", -1, 1, ssys_save, ssys_load, s);
     return 0;
 }
 
@@ -701,7 +704,7 @@ typedef struct {
 #define STELLARIS_I2C_MCS_IDLE    0x20
 #define STELLARIS_I2C_MCS_BUSBSY  0x40
 
-static uint32_t stellaris_i2c_read(void *opaque, a_target_phys_addr offset)
+static uint32_t stellaris_i2c_read(void *opaque, target_phys_addr_t offset)
 {
     stellaris_i2c_state *s = (stellaris_i2c_state *)opaque;
 
@@ -737,7 +740,7 @@ static void stellaris_i2c_update(stellaris_i2c_state *s)
     qemu_set_irq(s->irq, level);
 }
 
-static void stellaris_i2c_write(void *opaque, a_target_phys_addr offset,
+static void stellaris_i2c_write(void *opaque, target_phys_addr_t offset,
                                 uint32_t value)
 {
     stellaris_i2c_state *s = (stellaris_i2c_state *)opaque;
@@ -883,11 +886,12 @@ static int stellaris_i2c_init(SysBusDevice * dev)
     s->bus = bus;
 
     iomemtype = cpu_register_io_memory(stellaris_i2c_readfn,
-                                       stellaris_i2c_writefn, s);
+                                       stellaris_i2c_writefn, s,
+                                       DEVICE_NATIVE_ENDIAN);
     sysbus_init_mmio(dev, 0x1000, iomemtype);
     /* ??? For now we only implement the master interface.  */
     stellaris_i2c_reset(s);
-    register_savevm("stellaris_i2c", -1, 1,
+    register_savevm(&dev->qdev, "stellaris_i2c", -1, 1,
                     stellaris_i2c_save, stellaris_i2c_load, s);
     return 0;
 }
@@ -1009,7 +1013,7 @@ static void stellaris_adc_reset(stellaris_adc_state *s)
     }
 }
 
-static uint32_t stellaris_adc_read(void *opaque, a_target_phys_addr offset)
+static uint32_t stellaris_adc_read(void *opaque, target_phys_addr_t offset)
 {
     stellaris_adc_state *s = (stellaris_adc_state *)opaque;
 
@@ -1056,7 +1060,7 @@ static uint32_t stellaris_adc_read(void *opaque, a_target_phys_addr offset)
     }
 }
 
-static void stellaris_adc_write(void *opaque, a_target_phys_addr offset,
+static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
                                 uint32_t value)
 {
     stellaris_adc_state *s = (stellaris_adc_state *)opaque;
@@ -1192,11 +1196,12 @@ static int stellaris_adc_init(SysBusDevice *dev)
     }
 
     iomemtype = cpu_register_io_memory(stellaris_adc_readfn,
-                                       stellaris_adc_writefn, s);
+                                       stellaris_adc_writefn, s,
+                                       DEVICE_NATIVE_ENDIAN);
     sysbus_init_mmio(dev, 0x1000, iomemtype);
     stellaris_adc_reset(s);
     qdev_init_gpio_in(&dev->qdev, stellaris_adc_trigger, 1);
-    register_savevm("stellaris_adc", -1, 1,
+    register_savevm(&dev->qdev, "stellaris_adc", -1, 1,
                     stellaris_adc_save, stellaris_adc_load, s);
     return 0;
 }
@@ -1256,7 +1261,7 @@ static int stellaris_ssi_bus_init(SSISlave *dev)
     s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
     qdev_init_gpio_in(&dev->qdev, stellaris_ssi_bus_select, 1);
 
-    register_savevm("stellaris_ssi_bus", -1, 1,
+    register_savevm(&dev->qdev, "stellaris_ssi_bus", -1, 1,
                     stellaris_ssi_bus_save, stellaris_ssi_bus_load, s);
     return 0;
 }
@@ -1367,7 +1372,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
             gpio_out[GPIO_D][0] = qdev_get_gpio_in(mux, 0);
 
             bus = qdev_get_child_bus(mux, "ssi0");
-            dev = ssi_create_slave(bus, "ssi-sd");
+            ssi_create_slave(bus, "ssi-sd");
 
             bus = qdev_get_child_bus(mux, "ssi1");
             dev = ssi_create_slave(bus, "ssd0323");
@@ -1383,8 +1388,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
         qemu_check_nic_model(&nd_table[0], "stellaris");
 
         enet = qdev_create(NULL, "stellaris_enet");
-        enet->nd = &nd_table[0];
-        qdev_init(enet);
+        qdev_set_nic_properties(enet, &nd_table[0]);
+        qdev_init_nofail(enet);
         sysbus_mmio_map(sysbus_from_qdev(enet), 0, 0x40048000);
         sysbus_connect_irq(sysbus_from_qdev(enet), 0, pic[42]);
     }
@@ -1412,7 +1417,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
 }
 
 /* FIXME: Figure out how to generate these from stellaris_boards.  */
-static void lm3s811evb_init(a_ram_addr ram_size,
+static void lm3s811evb_init(ram_addr_t ram_size,
                      const char *boot_device,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)
@@ -1420,7 +1425,7 @@ static void lm3s811evb_init(a_ram_addr ram_size,
     stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
 }
 
-static void lm3s6965evb_init(a_ram_addr ram_size,
+static void lm3s6965evb_init(ram_addr_t ram_size,
                      const char *boot_device,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)