SPARC: Emulation of GRLIB APB UART

[qemu.git] / hw / axis_dev88.c

diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c
index 5ceb653920004c99d72284504c8ae864920fb41f..57b5e2f04109aae1265d4299754bdf7f3d6b6425 100644 (file)
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@@ -30,6 +30,7 @@
 #include "etraxfs.h"
 #include "loader.h"
 #include "elf.h"
+#include "cris-boot.h"
 
 #define D(x)
 #define DNAND(x)
@@ -44,7 +45,7 @@ struct nand_state_t
 };
 
 static struct nand_state_t nand_state;
-static uint32_t nand_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t nand_readl (void *opaque, target_phys_addr_t addr)
 {
     struct nand_state_t *s = opaque;
     uint32_t r;
@@ -59,7 +60,7 @@ static uint32_t nand_readl (void *opaque, a_target_phys_addr addr)
 }
 
 static void
-nand_writel (void *opaque, a_target_phys_addr addr, uint32_t value)
+nand_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
 {
     struct nand_state_t *s = opaque;
     int rdy;
@@ -168,7 +169,7 @@ static struct gpio_state_t
     uint32_t regs[0x5c / 4];
 } gpio_state;
 
-static uint32_t gpio_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t gpio_readl (void *opaque, target_phys_addr_t addr)
 {
     struct gpio_state_t *s = opaque;
     uint32_t r = 0;
@@ -197,7 +198,7 @@ static uint32_t gpio_readl (void *opaque, a_target_phys_addr addr)
     D(printf("%s %x=%x\n", __func__, addr, r));
 }
 
-static void gpio_writel (void *opaque, a_target_phys_addr addr, uint32_t value)
+static void gpio_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
 {
     struct gpio_state_t *s = opaque;
     D(printf("%s %x=%x\n", __func__, addr, value));
@@ -240,17 +241,10 @@ static CPUWriteMemoryFunc * const gpio_write[] = {
 
 #define INTMEM_SIZE (128 * 1024)
 
-static uint32_t bootstrap_pc;
-static void main_cpu_reset(void *opaque)
-{
-    CPUState *env = opaque;
-    cpu_reset(env);
-
-    env->pc = bootstrap_pc;
-}
+static struct cris_load_info li;
 
 static
-void axisdev88_init (a_ram_addr ram_size,
+void axisdev88_init (ram_addr_t ram_size,
                      const char *boot_device,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)
@@ -261,38 +255,38 @@ void axisdev88_init (a_ram_addr ram_size,
     qemu_irq irq[30], nmi[2], *cpu_irq;
     void *etraxfs_dmac;
     struct etraxfs_dma_client *eth[2] = {NULL, NULL};
-    int kernel_size;
     int i;
     int nand_regs;
     int gpio_regs;
-    a_ram_addr phys_ram;
-    a_ram_addr phys_intmem;
+    ram_addr_t phys_ram;
+    ram_addr_t phys_intmem;
 
     /* init CPUs */
     if (cpu_model == NULL) {
         cpu_model = "crisv32";
     }
     env = cpu_init(cpu_model);
-    qemu_register_reset(main_cpu_reset, env);
 
     /* allocate RAM */
-    phys_ram = qemu_ram_alloc(ram_size);
+    phys_ram = qemu_ram_alloc(NULL, "axisdev88.ram", ram_size);
     cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
 
     /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the 
        internal memory.  */
-    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
+    phys_intmem = qemu_ram_alloc(NULL, "axisdev88.chipram", INTMEM_SIZE);
     cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
                                  phys_intmem | IO_MEM_RAM);
 
 
       /* Attach a NAND flash to CS1.  */
     nand_state.nand = nand_init(NAND_MFR_STMICRO, 0x39);
-    nand_regs = cpu_register_io_memory(nand_read, nand_write, &nand_state);
+    nand_regs = cpu_register_io_memory(nand_read, nand_write, &nand_state,
+                                       DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(0x10000000, 0x05000000, nand_regs);
 
     gpio_state.nand = &nand_state;
-    gpio_regs = cpu_register_io_memory(gpio_read, gpio_write, &gpio_state);
+    gpio_regs = cpu_register_io_memory(gpio_read, gpio_write, &gpio_state,
+                                       DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(0x3001a000, 0x5c, gpio_regs);
 
 
@@ -300,7 +294,7 @@ void axisdev88_init (a_ram_addr ram_size,
     dev = qdev_create(NULL, "etraxfs,pic");
     /* FIXME: Is there a proper way to signal vectors to the CPU core?  */
     qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
-    qdev_init(dev);
+    qdev_init_nofail(dev);
     s = sysbus_from_qdev(dev);
     sysbus_mmio_map(s, 0, 0x3001c000);
     sysbus_connect_irq(s, 0, cpu_irq[0]);
@@ -339,39 +333,14 @@ void axisdev88_init (a_ram_addr ram_size,
                              irq[0x14 + i]);
     }
 
-    if (kernel_filename) {
-        uint64_t entry, high;
-        int kcmdline_len;
-
-        /* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis 
-           devboard SDK.  */
-        kernel_size = load_elf(kernel_filename, -0x80000000LL,
-                               &entry, NULL, &high, 0, ELF_MACHINE, 0);
-        bootstrap_pc = entry;
-        if (kernel_size < 0) {
-            /* Takes a kimage from the axis devboard SDK.  */
-            kernel_size = load_image_targphys(kernel_filename, 0x40004000,
-                                              ram_size);
-            bootstrap_pc = 0x40004000;
-            env->regs[9] = 0x40004000 + kernel_size;
-        }
-        env->regs[8] = 0x56902387; /* RAM init magic.  */
-
-        if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {
-            if (kcmdline_len > 256) {
-                fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n");
-                exit(1);
-            }
-            /* Let the kernel know we are modifying the cmdline.  */
-            env->regs[10] = 0x87109563;
-            env->regs[11] = 0x40000000;
-            pstrcpy_targphys(env->regs[11], 256, kernel_cmdline);
-        }
+    if (!kernel_filename) {
+        fprintf(stderr, "Kernel image must be specified\n");
+        exit(1);
     }
-    env->pc = bootstrap_pc;
 
-    printf ("pc =%x\n", env->pc);
-    printf ("ram size =%ld\n", ram_size);
+    li.image_filename = kernel_filename;
+    li.cmdline = kernel_cmdline;
+    cris_load_image(env, &li);
 }
 
 static QEMUMachine axisdev88_machine = {