return 0;
}
-static int sun4u_NVRAM_set_params (a_m48t59 *nvram, uint16_t NVRAM_size,
+static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
const char *arch,
- a_ram_addr RAM_size,
+ ram_addr_t RAM_size,
const char *boot_devices,
uint32_t kernel_image, uint32_t kernel_size,
const char *cmdline,
}
static unsigned long sun4u_load_kernel(const char *kernel_filename,
const char *initrd_filename,
- a_ram_addr RAM_size, long *initrd_size)
+ ram_addr_t RAM_size, long *initrd_size)
{
int linux_boot;
unsigned int i;
ptimer_set_limit(opaque, -limit, 0);
}
-static const int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
-static const int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
-
static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
device_init(pci_ebus_register);
/* Boot PROM (OpenBIOS) */
-static void prom_init(a_target_phys_addr addr, const char *bios_name)
+static void prom_init(target_phys_addr_t addr, const char *bios_name)
{
DeviceState *dev;
SysBusDevice *s;
static int prom_init1(SysBusDevice *dev)
{
- a_ram_addr prom_offset;
+ ram_addr_t prom_offset;
prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
/* System RAM */
static int ram_init1(SysBusDevice *dev)
{
- a_ram_addr RAM_size, ram_offset;
+ ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
RAM_size = d->size;
return 0;
}
-static void ram_init(a_target_phys_addr addr, a_ram_addr RAM_size)
+static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size)
{
DeviceState *dev;
SysBusDevice *s;
return env;
}
-static void sun4uv_init(a_ram_addr RAM_size,
+static void sun4uv_init(ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
const struct hwdef *hwdef)
{
CPUState *env;
- a_m48t59 *nvram;
+ m48t59_t *nvram;
unsigned int i;
long initrd_size, kernel_size;
PCIBus *pci_bus, *pci_bus2, *pci_bus3;
qemu_irq *irq;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
- BlockDriverState *fd[MAX_FD];
+ DriveInfo *fd[MAX_FD];
void *fw_cfg;
- DriveInfo *dinfo;
/* init CPUs */
env = cpu_devinit(cpu_model, hwdef);
}
for(; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
- serial_init(serial_io[i], NULL/*serial_irq[i]*/, 115200,
- serial_hds[i]);
+ serial_isa_init(i, serial_hds[i]);
}
}
for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
if (parallel_hds[i]) {
- parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/,
- parallel_hds[i]);
+ parallel_init(i, parallel_hds[i]);
}
}
for(i = 0; i < nb_nics; i++)
- pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
+ pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
isa_create_simple("i8042");
for(i = 0; i < MAX_FD; i++) {
- dinfo = drive_get(IF_FLOPPY, 0, i);
- fd[i] = dinfo ? dinfo->bdrv : NULL;
+ fd[i] = drive_get(IF_FLOPPY, 0, i);
}
fdctrl_init_isa(fd);
nvram = m48t59_init_isa(0x0074, NVRAM_SIZE, 59);
};
/* Sun4u hardware initialisation */
-static void sun4u_init(a_ram_addr RAM_size,
+static void sun4u_init(ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
}
/* Sun4v hardware initialisation */
-static void sun4v_init(a_ram_addr RAM_size,
+static void sun4v_init(ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
}
/* Niagara hardware initialisation */
-static void niagara_init(a_ram_addr RAM_size,
+static void niagara_init(ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)