*/
#include "qemu/osdep.h"
-#include <glib.h>
#include <glib/gstdio.h>
-#include <sys/mman.h>
#include "contrib/ivshmem-server/ivshmem-server.h"
#include "libqos/pci-pc.h"
#include "libqtest.h"
typedef struct _IVState {
QTestState *qtest;
- void *reg_base, *mem_base;
+ QPCIBar reg_bar, mem_bar;
QPCIBus *pcibus;
QPCIDevice *dev;
} IVState;
unsigned res;
global_qtest = s->qtest;
- res = qpci_io_readl(s->dev, s->reg_base + reg);
+ res = qpci_io_readl(s->dev, s->reg_bar, reg);
g_test_message("*%s -> %x\n", name, res);
global_qtest = qtest;
global_qtest = s->qtest;
g_test_message("%x -> *%s\n", v, name);
- qpci_io_writel(s->dev, s->reg_base + reg, v);
+ qpci_io_writel(s->dev, s->reg_bar, reg, v);
+ global_qtest = qtest;
+}
+
+static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
+{
+ QTestState *qtest = global_qtest;
+
+ global_qtest = s->qtest;
+ qpci_memread(s->dev, s->mem_bar, off, buf, len);
+ global_qtest = qtest;
+}
+
+static inline void write_mem(IVState *s, uint64_t off,
+ const void *buf, size_t len)
+{
+ QTestState *qtest = global_qtest;
+
+ global_qtest = s->qtest;
+ qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
global_qtest = qtest;
}
uint64_t barsize;
s->qtest = qtest_start(cmd);
- s->pcibus = qpci_init_pc();
+ s->pcibus = qpci_init_pc(NULL);
s->dev = get_device(s->pcibus);
- s->reg_base = qpci_iomap(s->dev, 0, &barsize);
- g_assert_nonnull(s->reg_base);
+ s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
g_assert_cmpuint(barsize, ==, 256);
if (msix) {
qpci_msix_enable(s->dev);
}
- s->mem_base = qpci_iomap(s->dev, 2, &barsize);
- g_assert_nonnull(s->mem_base);
+ s->mem_bar = qpci_iomap(s->dev, 2, &barsize);
g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
qpci_device_enable(s->dev);
static void setup_vm(IVState *s)
{
- char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
+ char *cmd = g_strdup_printf("-object memory-backend-file"
+ ",id=mb1,size=1M,share,mem-path=/dev/shm%s"
+ " -device ivshmem-plain,memdev=mb1", tmpshm);
setup_vm_cmd(s, cmd, false);
setup_vm(&state);
s = &state;
- /* valid io */
- out_reg(s, INTRMASK, 0);
- in_reg(s, INTRSTATUS);
- in_reg(s, IVPOSITION);
+ /* initial state of readable registers */
+ g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
+ g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
+ g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
+ /* trigger interrupt via registers */
out_reg(s, INTRMASK, 0xffffffff);
g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
out_reg(s, INTRSTATUS, 1);
- /* XXX: intercept IRQ, not seen in resp */
+ /* check interrupt status */
g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
+ /* reading clears */
+ g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
+ /* TODO intercept actual interrupt (needs qtest work) */
- /* invalid io */
+ /* invalid register access */
out_reg(s, IVPOSITION, 1);
+ in_reg(s, DOORBELL);
+
+ /* ring the (non-functional) doorbell */
out_reg(s, DOORBELL, 8 << 16);
+ /* write shared memory */
for (i = 0; i < G_N_ELEMENTS(data); i++) {
data[i] = i;
}
- qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
+ write_mem(s, 0, data, sizeof(data));
+ /* verify write */
for (i = 0; i < G_N_ELEMENTS(data); i++) {
g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
}
+ /* read it back and verify read */
memset(data, 0, sizeof(data));
-
- qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
+ read_mem(s, 0, data, sizeof(data));
for (i = 0; i < G_N_ELEMENTS(data); i++) {
g_assert_cmpuint(data[i], ==, i);
}
/* host write, guest 1 & 2 read */
memset(tmpshmem, 0x42, TMPSHMSIZE);
- qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
+ read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
- qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
/* guest 1 write, guest 2 read */
memset(data, 0x43, TMPSHMSIZE);
- qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
+ write_mem(s1, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
- qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x43);
}
/* guest 2 write, guest 1 read */
memset(data, 0x44, TMPSHMSIZE);
- qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ write_mem(s2, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
- qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x44);
}
static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
{
char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
- "-device ivshmem,size=1M,chardev=chr0,vectors=%d,msi=%s",
- tmpserver, nvectors, msi ? "true" : "false");
+ "-device ivshmem%s,chardev=chr0,vectors=%d",
+ tmpserver,
+ msi ? "-doorbell" : ",size=1M,msi=off",
+ nvectors);
setup_vm_cmd(s, cmd, msi);
int nvectors = 2;
guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
- memset(tmpshmem, 0x42, TMPSHMSIZE);
ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
TMPSHMSIZE, nvectors,
g_test_verbose());
ret = ivshmem_server_start(&server);
g_assert_cmpint(ret, ==, 0);
- setup_vm_with_server(&state1, nvectors, msi);
- s1 = &state1;
- setup_vm_with_server(&state2, nvectors, msi);
- s2 = &state2;
-
- g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
- g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
-
- g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
-
thread.server = &server;
ret = pipe(thread.pipe);
g_assert_cmpint(ret, ==, 0);
thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
g_assert(thread.thread != NULL);
- /* waiting until mapping is done */
- while (g_get_monotonic_time() < end_time) {
- g_usleep(1000);
-
- if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
- qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
- break;
- }
- }
+ setup_vm_with_server(&state1, nvectors, msi);
+ s1 = &state1;
+ setup_vm_with_server(&state2, nvectors, msi);
+ s2 = &state2;
/* check got different VM ids */
vm1 = in_reg(s1, IVPOSITION);
vm2 = in_reg(s2, IVPOSITION);
- g_assert_cmpuint(vm1, !=, vm2);
+ g_assert_cmpint(vm1, >=, 0);
+ g_assert_cmpint(vm2, >=, 0);
+ g_assert_cmpint(vm1, !=, vm2);
+ /* check number of MSI-X vectors */
global_qtest = s1->qtest;
if (msi) {
ret = qpci_msix_table_size(s1->dev);
g_assert_cmpuint(ret, ==, nvectors);
}
- /* ping vm2 -> vm1 */
+ /* TODO test behavior before MSI-X is enabled */
+
+ /* ping vm2 -> vm1 on vector 0 */
if (msi) {
ret = qpci_msix_pending(s1->dev, 0);
g_assert_cmpuint(ret, ==, 0);
} else {
- out_reg(s1, INTRSTATUS, 0);
+ g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
}
out_reg(s2, DOORBELL, vm1 << 16);
do {
} while (ret == 0 && g_get_monotonic_time() < end_time);
g_assert_cmpuint(ret, !=, 0);
- /* ping vm1 -> vm2 */
+ /* ping vm1 -> vm2 on vector 1 */
global_qtest = s2->qtest;
if (msi) {
- ret = qpci_msix_pending(s2->dev, 0);
+ ret = qpci_msix_pending(s2->dev, 1);
g_assert_cmpuint(ret, ==, 0);
} else {
- out_reg(s2, INTRSTATUS, 0);
+ g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
}
- out_reg(s1, DOORBELL, vm2 << 16);
+ out_reg(s1, DOORBELL, vm2 << 16 | 1);
do {
g_usleep(10000);
- ret = msi ? qpci_msix_pending(s2->dev, 0) : in_reg(s2, INTRSTATUS);
+ ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
} while (ret == 0 && g_get_monotonic_time() < end_time);
g_assert_cmpuint(ret, !=, 0);
/* just for the sake of checking memory-backend property */
setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
- " -device ivshmem,x-memdev=mb1", false);
+ " -device ivshmem-plain,memdev=mb1", false);
cleanup_vm(&state);
}
projects / qemu.git / blobdiff