*
* This code is licensed under the GPLv2.
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
*/
#include "hw.h"
#include "pcmcia.h"
#include "pxa.h"
-struct pxa2xx_pcmcia_s {
- struct pcmcia_socket_s slot;
- struct pcmcia_card_s *card;
- target_phys_addr_t common_base;
- target_phys_addr_t attr_base;
- target_phys_addr_t io_base;
+
+struct PXA2xxPCMCIAState {
+ PCMCIASocket slot;
+ PCMCIACardState *card;
+ MemoryRegion common_iomem;
+ MemoryRegion attr_iomem;
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq cd_irq;
};
-static uint32_t pxa2xx_pcmcia_common_read(void *opaque,
- target_phys_addr_t offset)
+static uint64_t pxa2xx_pcmcia_common_read(void *opaque,
+ hwaddr offset, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->common_base;
return s->card->common_read(s->card->state, offset);
}
return 0;
}
-static void pxa2xx_pcmcia_common_write(void *opaque,
- target_phys_addr_t offset, uint32_t value)
+static void pxa2xx_pcmcia_common_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->common_base;
s->card->common_write(s->card->state, offset, value);
}
}
-static uint32_t pxa2xx_pcmcia_attr_read(void *opaque,
- target_phys_addr_t offset)
+static uint64_t pxa2xx_pcmcia_attr_read(void *opaque,
+ hwaddr offset, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->attr_base;
return s->card->attr_read(s->card->state, offset);
}
return 0;
}
-static void pxa2xx_pcmcia_attr_write(void *opaque,
- target_phys_addr_t offset, uint32_t value)
+static void pxa2xx_pcmcia_attr_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->attr_base;
s->card->attr_write(s->card->state, offset, value);
}
}
-static uint32_t pxa2xx_pcmcia_io_read(void *opaque,
- target_phys_addr_t offset)
+static uint64_t pxa2xx_pcmcia_io_read(void *opaque,
+ hwaddr offset, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->io_base;
return s->card->io_read(s->card->state, offset);
}
return 0;
}
-static void pxa2xx_pcmcia_io_write(void *opaque,
- target_phys_addr_t offset, uint32_t value)
+static void pxa2xx_pcmcia_io_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached) {
- offset -= s->io_base;
s->card->io_write(s->card->state, offset, value);
}
}
-static CPUReadMemoryFunc *pxa2xx_pcmcia_common_readfn[] = {
- pxa2xx_pcmcia_common_read,
- pxa2xx_pcmcia_common_read,
- pxa2xx_pcmcia_common_read,
-};
-
-static CPUWriteMemoryFunc *pxa2xx_pcmcia_common_writefn[] = {
- pxa2xx_pcmcia_common_write,
- pxa2xx_pcmcia_common_write,
- pxa2xx_pcmcia_common_write,
-};
-
-static CPUReadMemoryFunc *pxa2xx_pcmcia_attr_readfn[] = {
- pxa2xx_pcmcia_attr_read,
- pxa2xx_pcmcia_attr_read,
- pxa2xx_pcmcia_attr_read,
-};
-
-static CPUWriteMemoryFunc *pxa2xx_pcmcia_attr_writefn[] = {
- pxa2xx_pcmcia_attr_write,
- pxa2xx_pcmcia_attr_write,
- pxa2xx_pcmcia_attr_write,
+static const MemoryRegionOps pxa2xx_pcmcia_common_ops = {
+ .read = pxa2xx_pcmcia_common_read,
+ .write = pxa2xx_pcmcia_common_write,
+ .endianness = DEVICE_NATIVE_ENDIAN
};
-static CPUReadMemoryFunc *pxa2xx_pcmcia_io_readfn[] = {
- pxa2xx_pcmcia_io_read,
- pxa2xx_pcmcia_io_read,
- pxa2xx_pcmcia_io_read,
+static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = {
+ .read = pxa2xx_pcmcia_attr_read,
+ .write = pxa2xx_pcmcia_attr_write,
+ .endianness = DEVICE_NATIVE_ENDIAN
};
-static CPUWriteMemoryFunc *pxa2xx_pcmcia_io_writefn[] = {
- pxa2xx_pcmcia_io_write,
- pxa2xx_pcmcia_io_write,
- pxa2xx_pcmcia_io_write,
+static const MemoryRegionOps pxa2xx_pcmcia_io_ops = {
+ .read = pxa2xx_pcmcia_io_read,
+ .write = pxa2xx_pcmcia_io_write,
+ .endianness = DEVICE_NATIVE_ENDIAN
};
static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (!s->irq)
return;
qemu_set_irq(s->irq, level);
}
-struct pxa2xx_pcmcia_s *pxa2xx_pcmcia_init(target_phys_addr_t base)
+PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
+ hwaddr base)
{
- int iomemtype;
- struct pxa2xx_pcmcia_s *s;
+ PXA2xxPCMCIAState *s;
- s = (struct pxa2xx_pcmcia_s *)
- qemu_mallocz(sizeof(struct pxa2xx_pcmcia_s));
+ s = (PXA2xxPCMCIAState *)
+ g_malloc0(sizeof(PXA2xxPCMCIAState));
/* Socket I/O Memory Space */
- s->io_base = base | 0x00000000;
- iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_io_readfn,
- pxa2xx_pcmcia_io_writefn, s);
- cpu_register_physical_memory(s->io_base, 0x04000000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_pcmcia_io_ops, s,
+ "pxa2xx-pcmcia-io", 0x04000000);
+ memory_region_add_subregion(sysmem, base | 0x00000000,
+ &s->iomem);
/* Then next 64 MB is reserved */
/* Socket Attribute Memory Space */
- s->attr_base = base | 0x08000000;
- iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_attr_readfn,
- pxa2xx_pcmcia_attr_writefn, s);
- cpu_register_physical_memory(s->attr_base, 0x04000000, iomemtype);
+ memory_region_init_io(&s->attr_iomem, &pxa2xx_pcmcia_attr_ops, s,
+ "pxa2xx-pcmcia-attribute", 0x04000000);
+ memory_region_add_subregion(sysmem, base | 0x08000000,
+ &s->attr_iomem);
/* Socket Common Memory Space */
- s->common_base = base | 0x0c000000;
- iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_common_readfn,
- pxa2xx_pcmcia_common_writefn, s);
- cpu_register_physical_memory(s->common_base, 0x04000000, iomemtype);
+ memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s,
+ "pxa2xx-pcmcia-common", 0x04000000);
+ memory_region_add_subregion(sysmem, base | 0x0c000000,
+ &s->common_iomem);
if (base == 0x30000000)
s->slot.slot_string = "PXA PC Card Socket 1";
}
/* Insert a new card into a slot */
-int pxa2xx_pcmcia_attach(void *opaque, struct pcmcia_card_s *card)
+int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (s->slot.attached)
return -EEXIST;
/* Eject card from the slot */
int pxa2xx_pcmcia_dettach(void *opaque)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
if (!s->slot.attached)
return -ENOENT;
s->card->detach(s->card->state);
- s->card->slot = 0;
- s->card = 0;
+ s->card->slot = NULL;
+ s->card = NULL;
s->slot.attached = 0;
/* Who to notify on card events */
void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq)
{
- struct pxa2xx_pcmcia_s *s = (struct pxa2xx_pcmcia_s *) opaque;
+ PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
s->irq = irq;
s->cd_irq = cd_irq;
}
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