tests/tcg: target/mips: Include isa/ase and group name in test output

[qemu.git] / ioport.c

diff --git a/ioport.c b/ioport.c
index 193ef7685cf5233d41bb54d0915b31cfede5596f..04e360e79a3dfdcaa51f1ae796967d4be9decddd 100644 (file)
--- a/ioport.c
+++ b/ioport.c
@@ -25,8 +25,10 @@
  * splitted out ioport related stuffs from vl.c.
  */
 
+#include "qemu/osdep.h"
+#include "cpu.h"
 #include "exec/ioport.h"
-#include "trace.h"
+#include "trace-root.h"
 #include "exec/memory.h"
 #include "exec/address-spaces.h"
 
@@ -52,14 +54,14 @@ const MemoryRegionOps unassigned_io_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-void cpu_outb(pio_addr_t addr, uint8_t val)
+void cpu_outb(uint32_t addr, uint8_t val)
 {
     trace_cpu_out(addr, 'b', val);
     address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
                         &val, 1);
 }
 
-void cpu_outw(pio_addr_t addr, uint16_t val)
+void cpu_outw(uint32_t addr, uint16_t val)
 {
     uint8_t buf[2];
 
@@ -69,7 +71,7 @@ void cpu_outw(pio_addr_t addr, uint16_t val)
                         buf, 2);
 }
 
-void cpu_outl(pio_addr_t addr, uint32_t val)
+void cpu_outl(uint32_t addr, uint32_t val)
 {
     uint8_t buf[4];
 
@@ -79,7 +81,7 @@ void cpu_outl(pio_addr_t addr, uint32_t val)
                         buf, 4);
 }
 
-uint8_t cpu_inb(pio_addr_t addr)
+uint8_t cpu_inb(uint32_t addr)
 {
     uint8_t val;
 
@@ -89,7 +91,7 @@ uint8_t cpu_inb(pio_addr_t addr)
     return val;
 }
 
-uint16_t cpu_inw(pio_addr_t addr)
+uint16_t cpu_inw(uint32_t addr)
 {
     uint8_t buf[2];
     uint16_t val;
@@ -100,7 +102,7 @@ uint16_t cpu_inw(pio_addr_t addr)
     return val;
 }
 
-uint32_t cpu_inl(pio_addr_t addr)
+uint32_t cpu_inl(uint32_t addr)
 {
     uint8_t buf[4];
     uint32_t val;