tcg: Allow target-specific implementation of NAND.

[qemu.git] / tcg / ppc64 / tcg-target.h

diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index eaade01b8fd6ed8600f8ebfd06581dd765fedd3b..8ddbd2fb2bfed45e1c692474cbcd2d4faf5b415a 100644 (file)
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -68,17 +68,39 @@ enum {
 #define TCG_TARGET_CALL_STACK_OFFSET 48
 
 /* optional instructions */
-#define TCG_TARGET_HAS_neg_i32
 #define TCG_TARGET_HAS_div_i32
-#define TCG_TARGET_HAS_neg_i64
-#define TCG_TARGET_HAS_div_i64
+/* #define TCG_TARGET_HAS_rot_i32 */
 #define TCG_TARGET_HAS_ext8s_i32
 #define TCG_TARGET_HAS_ext16s_i32
+/* #define TCG_TARGET_HAS_ext8u_i32 */
+/* #define TCG_TARGET_HAS_ext16u_i32 */
+/* #define TCG_TARGET_HAS_bswap16_i32 */
+/* #define TCG_TARGET_HAS_bswap32_i32 */
+/* #define TCG_TARGET_HAS_not_i32 */
+#define TCG_TARGET_HAS_neg_i32
+/* #define TCG_TARGET_HAS_andc_i32 */
+/* #define TCG_TARGET_HAS_orc_i32 */
+/* #define TCG_TARGET_HAS_eqv_i32 */
+/* #define TCG_TARGET_HAS_nand_i32 */
+
+#define TCG_TARGET_HAS_div_i64
+/* #define TCG_TARGET_HAS_rot_i64 */
 #define TCG_TARGET_HAS_ext8s_i64
 #define TCG_TARGET_HAS_ext16s_i64
 #define TCG_TARGET_HAS_ext32s_i64
+/* #define TCG_TARGET_HAS_ext8u_i64 */
+/* #define TCG_TARGET_HAS_ext16u_i64 */
+/* #define TCG_TARGET_HAS_ext32u_i64 */
+/* #define TCG_TARGET_HAS_bswap16_i64 */
+/* #define TCG_TARGET_HAS_bswap32_i64 */
+/* #define TCG_TARGET_HAS_bswap64_i64 */
+/* #define TCG_TARGET_HAS_not_i64 */
+#define TCG_TARGET_HAS_neg_i64
+/* #define TCG_TARGET_HAS_andc_i64 */
+/* #define TCG_TARGET_HAS_orc_i64 */
+/* #define TCG_TARGET_HAS_eqv_i64 */
+/* #define TCG_TARGET_HAS_nand_i64 */
 
 #define TCG_AREG0 TCG_REG_R27
-#define TCG_AREG1 TCG_REG_R24
-#define TCG_AREG2 TCG_REG_R25
-#define TCG_AREG3 TCG_REG_R26
+
+#define TCG_TARGET_HAS_GUEST_BASE