#include <stdio.h>
#include "hw.h"
#include "net.h"
-
-#include "etraxfs_dma.h"
+#include "etraxfs.h"
#define D(x)
{
uint32_t regs[32];
+ int link;
+
unsigned int (*read)(struct qemu_phy *phy, unsigned int req);
void (*write)(struct qemu_phy *phy, unsigned int req,
unsigned int data);
switch (regnum) {
case 1:
+ if (!phy->link)
+ break;
/* MR1. */
/* Speeds and modes. */
r |= (1 << 13) | (1 << 14);
r |= (1 << 11) | (1 << 12);
r |= (1 << 5); /* Autoneg complete. */
r |= (1 << 3); /* Autoneg able. */
- r |= (1 << 2); /* Link. */
+ r |= (1 << 2); /* link. */
break;
case 5:
/* Link partner ability.
int duplex = 0;
int speed_100 = 0;
+ if (!phy->link)
+ break;
+
/* Are we advertising 100 half or 100 duplex ? */
speed_100 = !!(phy->regs[4] & ADVERTISE_100HALF);
speed_100 |= !!(phy->regs[4] & ADVERTISE_100FULL);
phy->regs[3] = 0xe400;
/* Autonegotiation advertisement reg. */
phy->regs[4] = 0x01E1;
+ phy->link = 1;
phy->read = tdk_read;
phy->write = tdk_write;
/* ETRAX-FS Ethernet MAC block starts here. */
#define RW_MA0_LO 0x00
-#define RW_MA0_HI 0x04
-#define RW_MA1_LO 0x08
-#define RW_MA1_HI 0x0c
-#define RW_GA_LO 0x10
-#define RW_GA_HI 0x14
-#define RW_GEN_CTRL 0x18
-#define RW_REC_CTRL 0x1c
-#define RW_TR_CTRL 0x20
-#define RW_CLR_ERR 0x24
-#define RW_MGM_CTRL 0x28
-#define R_STAT 0x2c
-#define FS_ETH_MAX_REGS 0x5c
+#define RW_MA0_HI 0x01
+#define RW_MA1_LO 0x02
+#define RW_MA1_HI 0x03
+#define RW_GA_LO 0x04
+#define RW_GA_HI 0x05
+#define RW_GEN_CTRL 0x06
+#define RW_REC_CTRL 0x07
+#define RW_TR_CTRL 0x08
+#define RW_CLR_ERR 0x09
+#define RW_MGM_CTRL 0x0a
+#define R_STAT 0x0b
+#define FS_ETH_MAX_REGS 0x17
struct fs_eth
{
- CPUState *env;
- qemu_irq *irq;
- VLANClientState *vc;
+ NICState *nic;
+ NICConf conf;
int ethregs;
/* Two addrs in the filter. */
}
}
-static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr)
-{
- struct fs_eth *eth = opaque;
- CPUState *env = eth->env;
- cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
- addr);
- return 0;
-}
-
static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
{
struct fs_eth *eth = opaque;
uint32_t r = 0;
+ addr >>= 2;
+
switch (addr) {
case R_STAT:
- /* Attach an MDIO/PHY abstraction. */
r = eth->mdio_bus.mdio & 1;
break;
default:
r = eth->regs[addr];
- D(printf ("%s %x\n", __func__, addr));
+ D(printf ("%s %x\n", __func__, addr * 4));
break;
}
return r;
}
-static void
-eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
-{
- struct fs_eth *eth = opaque;
- CPUState *env = eth->env;
- cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
- addr);
-}
-
static void eth_update_ma(struct fs_eth *eth, int ma)
{
int reg;
eth->macaddr[ma][i++] = eth->regs[reg] >> 8;
eth->macaddr[ma][i++] = eth->regs[reg] >> 16;
eth->macaddr[ma][i++] = eth->regs[reg] >> 24;
- eth->macaddr[ma][i++] = eth->regs[reg + 4];
- eth->macaddr[ma][i++] = eth->regs[reg + 4] >> 8;
+ eth->macaddr[ma][i++] = eth->regs[reg + 1];
+ eth->macaddr[ma][i] = eth->regs[reg + 1] >> 8;
D(printf("set mac%d=%x.%x.%x.%x.%x.%x\n", ma,
eth->macaddr[ma][0], eth->macaddr[ma][1],
{
struct fs_eth *eth = opaque;
+ addr >>= 2;
switch (addr)
{
case RW_MA0_LO:
- eth->regs[addr] = value;
- eth_update_ma(eth, 0);
- break;
case RW_MA0_HI:
eth->regs[addr] = value;
eth_update_ma(eth, 0);
break;
case RW_MA1_LO:
- eth->regs[addr] = value;
- eth_update_ma(eth, 1);
- break;
case RW_MA1_HI:
eth->regs[addr] = value;
eth_update_ma(eth, 1);
eth_validate_duplex(eth);
}
eth->mdio_bus.mdc = !!(value & 4);
+ eth->regs[addr] = value;
break;
case RW_REC_CTRL:
/* First bit on the wire of a MAC address signals multicast or
physical address. */
- if (!m_individual && !sa[0] & 1)
+ if (!m_individual && !(sa[0] & 1))
return 0;
/* Calculate the hash index for the GA registers. */
return match;
}
-static int eth_can_receive(void *opaque)
+static int eth_can_receive(VLANClientState *nc)
{
return 1;
}
-static void eth_receive(void *opaque, const uint8_t *buf, int size)
+static ssize_t eth_receive(VLANClientState *nc, const uint8_t *buf, size_t size)
{
unsigned char sa_bcast[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
- struct fs_eth *eth = opaque;
+ struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
int use_ma0 = eth->regs[RW_REC_CTRL] & 1;
int use_ma1 = eth->regs[RW_REC_CTRL] & 2;
int r_bcast = eth->regs[RW_REC_CTRL] & 8;
if (size < 12)
- return;
+ return -1;
D(printf("%x.%x.%x.%x.%x.%x ma=%d %d bc=%d\n",
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
&& (!use_ma1 || memcmp(buf, eth->macaddr[1], 6))
&& (!r_bcast || memcmp(buf, sa_bcast, 6))
&& !eth_match_groupaddr(eth, buf))
- return;
+ return size;
/* FIXME: Find another way to pass on the fake csum. */
etraxfs_dmac_input(eth->dma_in, (void *)buf, size + 4, 1);
+
+ return size;
}
static int eth_tx_push(void *opaque, unsigned char *buf, int len)
struct fs_eth *eth = opaque;
D(printf("%s buf=%p len=%d\n", __func__, buf, len));
- qemu_send_packet(eth->vc, buf, len);
+ qemu_send_packet(ð->nic->nc, buf, len);
return len;
}
-static CPUReadMemoryFunc *eth_read[] = {
- ð_rinvalid,
- ð_rinvalid,
+static void eth_set_link(VLANClientState *nc)
+{
+ struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
+ D(printf("%s %d\n", __func__, nc->link_down));
+ eth->phy.link = !nc->link_down;
+}
+
+static CPUReadMemoryFunc * const eth_read[] = {
+ NULL, NULL,
ð_readl,
};
-static CPUWriteMemoryFunc *eth_write[] = {
- ð_winvalid,
- ð_winvalid,
+static CPUWriteMemoryFunc * const eth_write[] = {
+ NULL, NULL,
ð_writel,
};
-void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
- qemu_irq *irq, target_phys_addr_t base)
+static void eth_cleanup(VLANClientState *nc)
+{
+ struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
+
+ cpu_unregister_io_memory(eth->ethregs);
+
+ qemu_free(eth->dma_out);
+ qemu_free(eth);
+}
+
+static NetClientInfo net_etraxfs_info = {
+ .type = NET_CLIENT_TYPE_NIC,
+ .size = sizeof(NICState),
+ .can_receive = eth_can_receive,
+ .receive = eth_receive,
+ .cleanup = eth_cleanup,
+ .link_status_changed = eth_set_link,
+};
+
+void *etraxfs_eth_init(NICInfo *nd, target_phys_addr_t base, int phyaddr)
{
struct etraxfs_dma_client *dma = NULL;
struct fs_eth *eth = NULL;
- dma = qemu_mallocz(sizeof *dma * 2);
- if (!dma)
- return NULL;
+ qemu_check_nic_model(nd, "fseth");
+ dma = qemu_mallocz(sizeof *dma * 2);
eth = qemu_mallocz(sizeof *eth);
- if (!eth)
- goto err;
dma[0].client.push = eth_tx_push;
dma[0].client.opaque = eth;
dma[1].client.opaque = eth;
dma[1].client.pull = NULL;
- eth->env = env;
- eth->irq = irq;
eth->dma_out = dma;
eth->dma_in = dma + 1;
/* Connect the phy. */
- eth->phyaddr = 1;
+ eth->phyaddr = phyaddr & 0x1f;
tdk_init(ð->phy);
mdio_attach(ð->mdio_bus, ð->phy, eth->phyaddr);
- eth->ethregs = cpu_register_io_memory(0, eth_read, eth_write, eth);
+ eth->ethregs = cpu_register_io_memory(eth_read, eth_write, eth,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory (base, 0x5c, eth->ethregs);
- eth->vc = qemu_new_vlan_client(nd->vlan,
- eth_receive, eth_can_receive, eth);
+ memcpy(eth->conf.macaddr.a, nd->macaddr, sizeof(nd->macaddr));
+ eth->conf.vlan = nd->vlan;
+ eth->conf.peer = nd->netdev;
+
+ eth->nic = qemu_new_nic(&net_etraxfs_info, ð->conf,
+ nd->model, nd->name, eth);
return dma;
- err:
- qemu_free(eth);
- qemu_free(dma);
- return NULL;
}
projects / qemu.git / blobdiff