#include "qemu-timer.h"
#include "sysemu.h"
#include "nvram.h"
+#include "qemu-log.h"
//#define PPC_DEBUG_IRQ
//#define PPC_DEBUG_TB
-extern FILE *logfile;
-extern int loglevel;
-
static void cpu_ppc_tb_stop (CPUState *env);
static void cpu_ppc_tb_start (CPUState *env);
}
#if defined(PPC_DEBUG_IRQ)
if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n",
- __func__, env, n_IRQ, level,
+ fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08" PRIx32
+ "req %08x\n", __func__, env, n_IRQ, level,
env->pending_interrupts, env->interrupt_request);
}
#endif
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
#if defined(PPC_DEBUG_TB)
if (loglevel != 0) {
- fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
+ fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
}
#endif
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
#if defined(PPC_DEBUG_TB)
if (loglevel != 0) {
- fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
+ fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
}
#endif
*tb_offsetp = value - muldiv64(vmclk, tb_env->tb_freq, ticks_per_sec);
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s: tb=0x%016lx offset=%08lx\n", __func__, value,
- *tb_offsetp);
+ fprintf(logfile, "%s: tb %016" PRIx64 " offset %08" PRIx64 "\n",
+ __func__, value, *tb_offsetp);
}
#endif
}
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
#if defined(PPC_DEBUG_TB)
if (loglevel != 0) {
- fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
+ fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
}
#endif
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
#if defined(PPC_DEBUG_TB)
if (loglevel != 0) {
- fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb);
+ fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
}
#endif
{
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb, atb, vmclk;
-
+
/* If the time base is not frozen, do nothing */
if (tb_env->tb_freq == 0) {
vmclk = qemu_get_clock(vm_clock);
decr = -muldiv64(-diff, tb_env->decr_freq, ticks_per_sec);
#if defined(PPC_DEBUG_TB)
if (loglevel != 0) {
- fprintf(logfile, "%s: 0x%08x\n", __func__, decr);
+ fprintf(logfile, "%s: %08" PRIx32 "\n", __func__, decr);
}
#endif
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s: 0x%08x => 0x%08x\n", __func__, decr, value);
+ fprintf(logfile, "%s: %08" PRIx32 " => %08" PRIx32 "\n", __func__,
+ decr, value);
}
#endif
now = qemu_get_clock(vm_clock);
}
/* Specific helpers for POWER & PowerPC 601 RTC */
-clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
+#if 0
+static clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
{
return cpu_ppc_tb_init(env, 7812500);
}
+#endif
void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value)
{
} else {
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s: start PIT 0x" REGX "\n",
+ fprintf(logfile, "%s: start PIT %016" PRIx64 "\n",
__func__, ppcemb_timer->pit_reload);
}
#endif
ppcemb_timer = tb_env->opaque;
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s %p %p\n", __func__, tb_env, ppcemb_timer);
+ fprintf(logfile, "%s val" ADDRX "\n", __func__, val);
}
#endif
ppcemb_timer->pit_reload = val;
{
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s: val=" ADDRX "\n", __func__, val);
+ fprintf(logfile, "%s: val " ADDRX "\n", __func__, val);
}
#endif
env->spr[SPR_40x_TSR] &= ~(val & 0xFC000000);
tb_env = env->tb_env;
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s: val=" ADDRX "\n", __func__, val);
+ fprintf(logfile, "%s: val " ADDRX "\n", __func__, val);
}
#endif
env->spr[SPR_40x_TCR] = val & 0xFFC00000;
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s set new frequency to %u\n", __func__, freq);
+ fprintf(logfile, "%s set new frequency to %" PRIu32 "\n", __func__,
+ freq);
}
#endif
tb_env->tb_freq = freq;
tb_env->opaque = ppcemb_timer;
#ifdef PPC_DEBUG_TB
if (loglevel != 0) {
- fprintf(logfile, "%s %p %p %p\n", __func__, tb_env, ppcemb_timer,
- &ppc_emb_set_tb_clk);
+ fprintf(logfile, "%s freq %" PRIu32 "\n", __func__, freq);
}
#endif
if (ppcemb_timer != NULL) {
fflush(stdout);
break;
case 2:
- printf("Set loglevel to %04x\n", val);
+ printf("Set loglevel to %04" PRIx32 "\n", val);
cpu_set_log(val | 0x100);
break;
}
}
void NVRAM_set_string (nvram_t *nvram, uint32_t addr,
- const unsigned char *str, uint32_t max)
+ const char *str, uint32_t max)
{
int i;
return tmp;
}
-uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
+static uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
{
uint32_t i;
uint16_t crc = 0xFFFF;
#define CMDLINE_ADDR 0x017ff000
int PPC_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size,
- const unsigned char *arch,
+ const char *arch,
uint32_t RAM_size, int boot_device,
uint32_t kernel_image, uint32_t kernel_size,
const char *cmdline,
NVRAM_set_lword(nvram, 0x3C, kernel_size);
if (cmdline) {
/* XXX: put the cmdline in NVRAM too ? */
- strcpy(phys_ram_base + CMDLINE_ADDR, cmdline);
+ strcpy((char *)(phys_ram_base + CMDLINE_ADDR), cmdline);
NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR);
NVRAM_set_lword(nvram, 0x44, strlen(cmdline));
} else {