/* We only map the first 64 registers */
#define TCG_TARGET_NB_REGS 64
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
TCG_REG_R61,
TCG_REG_R62,
TCG_REG_R63,
-};
+} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_CT_CONST_S22 0x200
/* Guest base is supported */
#define TCG_TARGET_HAS_GUEST_BASE
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
start = start & ~(32UL - 1UL);
stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL);