#include "sysbus.h"
#include "arm-misc.h"
#include "sysemu.h"
+#include "loader.h"
+#include "elf.h"
/* Bitbanded IO. Each word corresponds to a single bit. */
dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x20000000);
- qdev_init(dev);
+ qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x40000000);
- qdev_init(dev);
+ qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
}
/* Board init. */
+
+static void armv7m_reset(void *opaque)
+{
+ cpu_reset((CPUState *)opaque);
+}
+
/* Init CPU and memory for a v7-M based board.
flash_size and sram_size are in kb.
Returns the NVIC array. */
/* FIXME: make this local state. */
static qemu_irq pic[64];
qemu_irq *cpu_pic;
- uint32_t pc;
int image_size;
uint64_t entry;
uint64_t lowaddr;
int i;
+ int big_endian;
flash_size *= 1024;
sram_size *= 1024;
armv7m_bitband_init();
nvic = qdev_create(NULL, "armv7m_nvic");
- env->v7m.nvic = nvic;
- qdev_init(nvic);
+ env->nvic = nvic;
+ qdev_init_nofail(nvic);
cpu_pic = arm_pic_init_cpu(env);
sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
for (i = 0; i < 64; i++) {
pic[i] = qdev_get_gpio_in(nvic, i);
}
- image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL);
+#ifdef TARGET_WORDS_BIGENDIAN
+ big_endian = 1;
+#else
+ big_endian = 0;
+#endif
+
+ image_size = load_elf(kernel_filename, NULL, NULL, &entry, &lowaddr,
+ NULL, big_endian, ELF_MACHINE, 1);
if (image_size < 0) {
image_size = load_image_targphys(kernel_filename, 0, flash_size);
lowaddr = 0;
exit(1);
}
- /* If the image was loaded at address zero then assume it is a
- regular ROM image and perform the normal CPU reset sequence.
- Otherwise jump directly to the entry point. */
- if (lowaddr == 0) {
- env->regs[13] = ldl_phys(0);
- pc = ldl_phys(4);
- } else {
- pc = entry;
- }
- env->thumb = pc & 1;
- env->regs[15] = pc & ~1;
-
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
cpu_register_physical_memory(0xfffff000, 0x1000,
qemu_ram_alloc(0x1000) | IO_MEM_RAM);
+ qemu_register_reset(armv7m_reset, env);
return pic;
}