]> Git Repo - qemu.git/blobdiff - hw/usb-uhci.c
ide: port pci ide to vmstate
[qemu.git] / hw / usb-uhci.c
index a112a6960ea7a522d636e69b875d1b52e6240f55..67a9a233c6062eb36166768a581292e56343ba58 100644 (file)
@@ -122,6 +122,7 @@ typedef struct UHCIPort {
 
 typedef struct UHCIState {
     PCIDevice dev;
+    USBBus bus;
     uint16_t cmd; /* cmd register */
     uint16_t status;
     uint16_t intr; /* interrupt enable register */
@@ -138,6 +139,7 @@ typedef struct UHCIState {
     /* Active packets */
     UHCIAsync *async_pending;
     UHCIAsync *async_pool;
+    uint8_t num_ports_vmstate;
 } UHCIState;
 
 typedef struct UHCI_TD {
@@ -349,59 +351,46 @@ static void uhci_reset(void *opaque)
     uhci_async_cancel_all(s);
 }
 
-static void uhci_save(QEMUFile *f, void *opaque)
+static void uhci_pre_save(void *opaque)
 {
     UHCIState *s = opaque;
-    uint8_t num_ports = NB_PORTS;
-    int i;
 
     uhci_async_cancel_all(s);
-
-    pci_device_save(&s->dev, f);
-
-    qemu_put_8s(f, &num_ports);
-    for (i = 0; i < num_ports; ++i)
-        qemu_put_be16s(f, &s->ports[i].ctrl);
-    qemu_put_be16s(f, &s->cmd);
-    qemu_put_be16s(f, &s->status);
-    qemu_put_be16s(f, &s->intr);
-    qemu_put_be16s(f, &s->frnum);
-    qemu_put_be32s(f, &s->fl_base_addr);
-    qemu_put_8s(f, &s->sof_timing);
-    qemu_put_8s(f, &s->status2);
-    qemu_put_timer(f, s->frame_timer);
 }
 
-static int uhci_load(QEMUFile *f, void *opaque, int version_id)
-{
-    UHCIState *s = opaque;
-    uint8_t num_ports;
-    int i, ret;
-
-    if (version_id > 1)
-        return -EINVAL;
-
-    ret = pci_device_load(&s->dev, f);
-    if (ret < 0)
-        return ret;
-
-    qemu_get_8s(f, &num_ports);
-    if (num_ports != NB_PORTS)
-        return -EINVAL;
-
-    for (i = 0; i < num_ports; ++i)
-        qemu_get_be16s(f, &s->ports[i].ctrl);
-    qemu_get_be16s(f, &s->cmd);
-    qemu_get_be16s(f, &s->status);
-    qemu_get_be16s(f, &s->intr);
-    qemu_get_be16s(f, &s->frnum);
-    qemu_get_be32s(f, &s->fl_base_addr);
-    qemu_get_8s(f, &s->sof_timing);
-    qemu_get_8s(f, &s->status2);
-    qemu_get_timer(f, s->frame_timer);
-
-    return 0;
-}
+static const VMStateDescription vmstate_uhci_port = {
+    .name = "uhci port",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT16(ctrl, UHCIPort),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+static const VMStateDescription vmstate_uhci = {
+    .name = "uhci",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .pre_save = uhci_pre_save,
+    .fields      = (VMStateField []) {
+        VMSTATE_PCI_DEVICE(dev, UHCIState),
+        VMSTATE_UINT8_EQUAL(num_ports_vmstate, UHCIState),
+        VMSTATE_STRUCT_ARRAY(ports, UHCIState, NB_PORTS, 1,
+                             vmstate_uhci_port, UHCIPort),
+        VMSTATE_UINT16(cmd, UHCIState),
+        VMSTATE_UINT16(status, UHCIState),
+        VMSTATE_UINT16(intr, UHCIState),
+        VMSTATE_UINT16(frnum, UHCIState),
+        VMSTATE_UINT32(fl_base_addr, UHCIState),
+        VMSTATE_UINT8(sof_timing, UHCIState),
+        VMSTATE_UINT8(status2, UHCIState),
+        VMSTATE_TIMER(frame_timer, UHCIState),
+        VMSTATE_END_OF_LIST()
+    }
+};
 
 static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 {
@@ -1053,7 +1042,7 @@ static void uhci_frame_timer(void *opaque)
 
     /* prepare the timer for the next frame */
     expire_time = qemu_get_clock(vm_clock) +
-        (ticks_per_sec / FRAME_TIMER_FREQ);
+        (get_ticks_per_sec() / FRAME_TIMER_FREQ);
     qemu_mod_timer(s->frame_timer, expire_time);
 }
 
@@ -1070,18 +1059,11 @@ static void uhci_map(PCIDevice *pci_dev, int region_num,
     register_ioport_read(addr, 32, 1, uhci_ioport_readb, s);
 }
 
-void usb_uhci_piix3_init(PCIBus *bus, int devfn)
+static int usb_uhci_common_initfn(UHCIState *s)
 {
-    UHCIState *s;
-    uint8_t *pci_conf;
+    uint8_t *pci_conf = s->dev.config;
     int i;
 
-    s = (UHCIState *)pci_register_device(bus,
-                                        "USB-UHCI", sizeof(UHCIState),
-                                        devfn, NULL, NULL);
-    pci_conf = s->dev.config;
-    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
-    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_2);
     pci_conf[0x08] = 0x01; // revision number
     pci_conf[0x09] = 0x00;
     pci_config_set_class(pci_conf, PCI_CLASS_SERIAL_USB);
@@ -1089,10 +1071,12 @@ void usb_uhci_piix3_init(PCIBus *bus, int devfn)
     pci_conf[0x3d] = 4; // interrupt pin 3
     pci_conf[0x60] = 0x10; // release number
 
+    usb_bus_new(&s->bus, &s->dev.qdev);
     for(i = 0; i < NB_PORTS; i++) {
-        qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
+        usb_register_port(&s->bus, &s->ports[i].port, s, i, uhci_attach);
     }
     s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s);
+    s->num_ports_vmstate = NB_PORTS;
 
     qemu_register_reset(uhci_reset, s);
     uhci_reset(s);
@@ -1102,40 +1086,56 @@ void usb_uhci_piix3_init(PCIBus *bus, int devfn)
     pci_register_bar(&s->dev, 4, 0x20,
                            PCI_ADDRESS_SPACE_IO, uhci_map);
 
-    register_savevm("uhci", 0, 1, uhci_save, uhci_load, s);
+    vmstate_register(0, &vmstate_uhci, s);
+    return 0;
 }
 
-void usb_uhci_piix4_init(PCIBus *bus, int devfn)
+static int usb_uhci_piix3_initfn(PCIDevice *dev)
 {
-    UHCIState *s;
-    uint8_t *pci_conf;
-    int i;
+    UHCIState *s = DO_UPCAST(UHCIState, dev, dev);
+    uint8_t *pci_conf = s->dev.config;
+
+    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_2);
+    return usb_uhci_common_initfn(s);
+}
+
+static int usb_uhci_piix4_initfn(PCIDevice *dev)
+{
+    UHCIState *s = DO_UPCAST(UHCIState, dev, dev);
+    uint8_t *pci_conf = s->dev.config;
 
-    s = (UHCIState *)pci_register_device(bus,
-                                        "USB-UHCI", sizeof(UHCIState),
-                                        devfn, NULL, NULL);
-    pci_conf = s->dev.config;
     pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
     pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_2);
-    pci_conf[0x08] = 0x01; // revision number
-    pci_conf[0x09] = 0x00;
-    pci_config_set_class(pci_conf, PCI_CLASS_SERIAL_USB);
-    pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
-    pci_conf[0x3d] = 4; // interrupt pin 3
-    pci_conf[0x60] = 0x10; // release number
+    return usb_uhci_common_initfn(s);
+}
 
-    for(i = 0; i < NB_PORTS; i++) {
-        qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
+static PCIDeviceInfo uhci_info[] = {
+    {
+        .qdev.name    = "PIIX3 USB-UHCI",
+        .qdev.size    = sizeof(UHCIState),
+        .init         = usb_uhci_piix3_initfn,
+    },{
+        .qdev.name    = "PIIX4 USB-UHCI",
+        .qdev.size    = sizeof(UHCIState),
+        .init         = usb_uhci_piix4_initfn,
+    },{
+        /* end of list */
     }
-    s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s);
+};
 
-    qemu_register_reset(uhci_reset, s);
-    uhci_reset(s);
+static void uhci_register(void)
+{
+    pci_qdev_register_many(uhci_info);
+}
+device_init(uhci_register);
 
-    /* Use region 4 for consistency with real hardware.  BSD guests seem
-       to rely on this.  */
-    pci_register_bar(&s->dev, 4, 0x20,
-                           PCI_ADDRESS_SPACE_IO, uhci_map);
+void usb_uhci_piix3_init(PCIBus *bus, int devfn)
+{
+    pci_create_simple(bus, devfn, "PIIX3 USB-UHCI");
+}
 
-    register_savevm("uhci", 0, 1, uhci_save, uhci_load, s);
+void usb_uhci_piix4_init(PCIBus *bus, int devfn)
+{
+    pci_create_simple(bus, devfn, "PIIX4 USB-UHCI");
 }
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