vga: remove unused vga_common_save/load

[qemu.git] / hw / pl031.c

diff --git a/hw/pl031.c b/hw/pl031.c
index 7e8098ba59dee38ad07e3cb0da96c8c7ad7f1144..45b7032c5002f278cb6b38ed2a751da5e848a2f9 100644 (file)
--- a/hw/pl031.c
+++ b/hw/pl031.c
@@ -9,15 +9,16 @@
  *
  */
 
  *
  */
 

-#include"vl.h"
+#include "sysbus.h"
+#include "qemu-timer.h"

 
 //#define DEBUG_PL031
 
 #ifdef DEBUG_PL031
 
 //#define DEBUG_PL031
 
 #ifdef DEBUG_PL031

-#define DPRINTF(fmt, args...) \
-do { printf("pl031: " fmt , ##args); } while (0)
+#define DPRINTF(fmt, ...) \
+do { printf("pl031: " fmt , ## __VA_ARGS__); } while (0)

 #else
 #else

-#define DPRINTF(fmt, args...) do {} while(0)
+#define DPRINTF(fmt, ...) do {} while(0)

 #endif
 
 #define RTC_DR      0x00    /* Data read register */
 #endif
 
 #define RTC_DR      0x00    /* Data read register */


@@ -30,11 +31,10 @@ do { printf("pl031: " fmt , ##args); } while (0)
 #define RTC_ICR     0x1c    /* Interrupt clear register */
 
 typedef struct {
 #define RTC_ICR     0x1c    /* Interrupt clear register */
 
 typedef struct {

+    SysBusDevice busdev;

     QEMUTimer *timer;
     qemu_irq irq;
     QEMUTimer *timer;
     qemu_irq irq;

-    uint32_t base;

 
 

-    uint64_t start_time;

     uint32_t tick_offset;
 
     uint32_t mr;
     uint32_t tick_offset;
 
     uint32_t mr;


@@ -67,7 +67,7 @@ static uint32_t pl031_get_count(pl031_state *s)
 {
     /* This assumes qemu_get_clock returns the time since the machine was
        created.  */
 {
     /* This assumes qemu_get_clock returns the time since the machine was
        created.  */

-    return s->tick_offset + qemu_get_clock(vm_clock) / ticks_per_sec;
+    return s->tick_offset + qemu_get_clock(vm_clock) / get_ticks_per_sec();

 }
 
 static void pl031_set_alarm(pl031_state *s)
 }
 
 static void pl031_set_alarm(pl031_state *s)


@@ -76,7 +76,7 @@ static void pl031_set_alarm(pl031_state *s)
     uint32_t ticks;
 
     now = qemu_get_clock(vm_clock);
     uint32_t ticks;
 
     now = qemu_get_clock(vm_clock);

-    ticks = s->tick_offset + now / ticks_per_sec;
+    ticks = s->tick_offset + now / get_ticks_per_sec();

 
     /* The timer wraps around.  This subtraction also wraps in the same way,
        and gives correct results when alarm < now_ticks.  */
 
     /* The timer wraps around.  This subtraction also wraps in the same way,
        and gives correct results when alarm < now_ticks.  */


@@ -86,7 +86,7 @@ static void pl031_set_alarm(pl031_state *s)
         qemu_del_timer(s->timer);
         pl031_interrupt(s);
     } else {
         qemu_del_timer(s->timer);
         pl031_interrupt(s);
     } else {

-        qemu_mod_timer(s->timer, now + (int64_t)ticks * ticks_per_sec);
+        qemu_mod_timer(s->timer, now + (int64_t)ticks * get_ticks_per_sec());

     }
 }
 
     }
 }
 


@@ -94,8 +94,6 @@ static uint32_t pl031_read(void *opaque, target_phys_addr_t offset)
 {
     pl031_state *s = (pl031_state *)opaque;
 
 {
     pl031_state *s = (pl031_state *)opaque;
 

-    offset -= s->base;
-

     if (offset >= 0xfe0  &&  offset < 0x1000)
         return pl031_id[(offset - 0xfe0) >> 2];
 
     if (offset >= 0xfe0  &&  offset < 0x1000)
         return pl031_id[(offset - 0xfe0) >> 2];
 


@@ -120,8 +118,7 @@ static uint32_t pl031_read(void *opaque, target_phys_addr_t offset)
                 (int)offset);
         break;
     default:
                 (int)offset);
         break;
     default:

-        cpu_abort(cpu_single_env, "pl031_read: Bad offset 0x%x\n",
-                  (int)offset);
+        hw_error("pl031_read: Bad offset 0x%x\n", (int)offset);

         break;
     }
 
         break;
     }
 


@@ -133,7 +130,6 @@ static void pl031_write(void * opaque, target_phys_addr_t offset,
 {
     pl031_state *s = (pl031_state *)opaque;
 
 {
     pl031_state *s = (pl031_state *)opaque;
 

-    offset -= s->base;

 
     switch (offset) {
     case RTC_LR:
 
     switch (offset) {
     case RTC_LR:


@@ -170,50 +166,48 @@ static void pl031_write(void * opaque, target_phys_addr_t offset,
         break;
 
     default:
         break;
 
     default:

-        cpu_abort(cpu_single_env, "pl031_write: Bad offset 0x%x\n",
-                  (int)offset);
+        hw_error("pl031_write: Bad offset 0x%x\n", (int)offset);

         break;
     }
 }
 
         break;
     }
 }
 

-static CPUWriteMemoryFunc * pl031_writefn[] = {
+static CPUWriteMemoryFunc * const  pl031_writefn[] = {

     pl031_write,
     pl031_write,
     pl031_write
 };
 
     pl031_write,
     pl031_write,
     pl031_write
 };
 

-static CPUReadMemoryFunc * pl031_readfn[] = {
+static CPUReadMemoryFunc * const  pl031_readfn[] = {

     pl031_read,
     pl031_read,
     pl031_read
 };
 
     pl031_read,
     pl031_read,
     pl031_read
 };
 

-void pl031_init(uint32_t base, qemu_irq irq)
+static int pl031_init(SysBusDevice *dev)

 {
     int iomemtype;
 {
     int iomemtype;

-    pl031_state *s;
-    time_t ti;
-    struct tm *tm;
-
-    s = qemu_mallocz(sizeof(pl031_state));
-    if (!s)
-        cpu_abort(cpu_single_env, "pl031_init: Out of memory\n");
+    pl031_state *s = FROM_SYSBUS(pl031_state, dev);
+    struct tm tm;

 
 

-    iomemtype = cpu_register_io_memory(0, pl031_readfn, pl031_writefn, s);
-    if (iomemtype == -1)
-        cpu_abort(cpu_single_env, "pl031_init: Can't register I/O memory\n");
+    iomemtype = cpu_register_io_memory(pl031_readfn, pl031_writefn, s);
+    if (iomemtype == -1) {
+        hw_error("pl031_init: Can't register I/O memory\n");
+    }

 
 

-    cpu_register_physical_memory(base, 0x00001000, iomemtype);
+    sysbus_init_mmio(dev, 0x1000, iomemtype);

 
 

-    s->base = base;
-    s->irq  = irq;
+    sysbus_init_irq(dev, &s->irq);

     /* ??? We assume vm_clock is zero at this point.  */
     /* ??? We assume vm_clock is zero at this point.  */

-    time(&ti);
-    if (rtc_utc)
-        tm = gmtime(&ti);
-    else
-        tm = localtime(&ti);
-    s->tick_offset = mktime(tm);
+    qemu_get_timedate(&tm, 0);
+    s->tick_offset = mktimegm(&tm);

 
     s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s);
 
     s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s);

+    return 0;

 }
 }

+
+static void pl031_register_devices(void)
+{
+    sysbus_register_dev("pl031", sizeof(pl031_state), pl031_init);
+}
+
+device_init(pl031_register_devices)