#elif defined(TARGET_HPPA)
/* snan_bit_is_one, set msb-1. */
frac = 1ULL << (DECOMPOSED_BINARY_POINT - 2);
+#elif defined(TARGET_HEXAGON)
+ sign = 1;
+ frac = ~0ULL;
#else
/* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
* S390, SH4, TriCore, and Xtensa. I cannot find documentation
}
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the bfloat16 value `a' is a quiet
+| NaN; otherwise returns 0.
+*----------------------------------------------------------------------------*/
+
+bool bfloat16_is_quiet_nan(bfloat16 a_, float_status *status)
+{
+ if (no_signaling_nans(status)) {
+ return bfloat16_is_any_nan(a_);
+ } else {
+ uint16_t a = a_;
+ if (snan_bit_is_one(status)) {
+ return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
+ } else {
+ return ((a >> 6) & 0x1FF) == 0x1FF;
+ }
+ }
+}
+
/*----------------------------------------------------------------------------
| Returns 1 if the half-precision floating-point value `a' is a signaling
| NaN; otherwise returns 0.
}
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the bfloat16 value `a' is a signaling
+| NaN; otherwise returns 0.
+*----------------------------------------------------------------------------*/
+
+bool bfloat16_is_signaling_nan(bfloat16 a_, float_status *status)
+{
+ if (no_signaling_nans(status)) {
+ return 0;
+ } else {
+ uint16_t a = a_;
+ if (snan_bit_is_one(status)) {
+ return ((a >> 6) & 0x1FF) == 0x1FF;
+ } else {
+ return (((a >> 6) & 0x1FF) == 0x1FE) && (a & 0x3F);
+ }
+ }
+}
+
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is a quiet
| NaN; otherwise returns 0.