Rename target_phys_addr_t to hwaddr

[qemu.git] / hw / pl061.c

diff --git a/hw/pl061.c b/hw/pl061.c
index cf5adbe1fb2f30e9cb792a2e6bdba1d42254514c..7d182e7cdf551ecc7b1eddec4b1fc15941e497cf 100644 (file)
--- a/hw/pl061.c
+++ b/hw/pl061.c
@@ -30,6 +30,7 @@ static const uint8_t pl061_id_luminary[12] =
 
 typedef struct {
     SysBusDevice busdev;
+    MemoryRegion iomem;
     uint32_t locked;
     uint32_t data;
     uint32_t old_data;
@@ -112,7 +113,8 @@ static void pl061_update(pl061_state *s)
     /* FIXME: Implement input interrupts.  */
 }
 
-static uint32_t pl061_read(void *opaque, target_phys_addr_t offset)
+static uint64_t pl061_read(void *opaque, hwaddr offset,
+                           unsigned size)
 {
     pl061_state *s = (pl061_state *)opaque;
 
@@ -167,8 +169,8 @@ static uint32_t pl061_read(void *opaque, target_phys_addr_t offset)
     }
 }
 
-static void pl061_write(void *opaque, target_phys_addr_t offset,
-                        uint32_t value)
+static void pl061_write(void *opaque, hwaddr offset,
+                        uint64_t value, unsigned size)
 {
     pl061_state *s = (pl061_state *)opaque;
     uint8_t mask;
@@ -262,27 +264,18 @@ static void pl061_set_irq(void * opaque, int irq, int level)
     }
 }
 
-static CPUReadMemoryFunc * const pl061_readfn[] = {
-   pl061_read,
-   pl061_read,
-   pl061_read
-};
-
-static CPUWriteMemoryFunc * const pl061_writefn[] = {
-   pl061_write,
-   pl061_write,
-   pl061_write
+static const MemoryRegionOps pl061_ops = {
+    .read = pl061_read,
+    .write = pl061_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
 static int pl061_init(SysBusDevice *dev, const unsigned char *id)
 {
-    int iomemtype;
     pl061_state *s = FROM_SYSBUS(pl061_state, dev);
     s->id = id;
-    iomemtype = cpu_register_io_memory(pl061_readfn,
-                                       pl061_writefn, s,
-                                       DEVICE_NATIVE_ENDIAN);
-    sysbus_init_mmio(dev, 0x1000, iomemtype);
+    memory_region_init_io(&s->iomem, &pl061_ops, s, "pl061", 0x1000);
+    sysbus_init_mmio(dev, &s->iomem);
     sysbus_init_irq(dev, &s->irq);
     qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
     qdev_init_gpio_out(&dev->qdev, s->out, 8);
@@ -300,24 +293,42 @@ static int pl061_init_arm(SysBusDevice *dev)
     return pl061_init(dev, pl061_id);
 }
 
-static SysBusDeviceInfo pl061_info = {
-    .init = pl061_init_arm,
-    .qdev.name = "pl061",
-    .qdev.size = sizeof(pl061_state),
-    .qdev.vmsd = &vmstate_pl061,
+static void pl061_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+    k->init = pl061_init_arm;
+    dc->vmsd = &vmstate_pl061;
+}
+
+static TypeInfo pl061_info = {
+    .name          = "pl061",
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(pl061_state),
+    .class_init    = pl061_class_init,
 };
 
-static SysBusDeviceInfo pl061_luminary_info = {
-    .init = pl061_init_luminary,
-    .qdev.name = "pl061_luminary",
-    .qdev.size = sizeof(pl061_state),
-    .qdev.vmsd = &vmstate_pl061,
+static void pl061_luminary_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+    k->init = pl061_init_luminary;
+    dc->vmsd = &vmstate_pl061;
+}
+
+static TypeInfo pl061_luminary_info = {
+    .name          = "pl061_luminary",
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(pl061_state),
+    .class_init    = pl061_luminary_class_init,
 };
 
-static void pl061_register_devices(void)
+static void pl061_register_types(void)
 {
-    sysbus_register_withprop(&pl061_info);
-    sysbus_register_withprop(&pl061_luminary_info);
+    type_register_static(&pl061_info);
+    type_register_static(&pl061_luminary_info);
 }
 
-device_init(pl061_register_devices)
+type_init(pl061_register_types)