Merge remote-tracking branch 'awilliam/ipxe' into staging

[qemu.git] / hw / mac_nvram.c

diff --git a/hw/mac_nvram.c b/hw/mac_nvram.c
index c1281c33df807d25e7d1a9fc28873452817499bb..61e53d28b4d2bdaeec422f4b05d63e92a450ccf6 100644 (file)
--- a/hw/mac_nvram.c
+++ b/hw/mac_nvram.c
@@ -31,15 +31,16 @@
 //#define DEBUG_NVR
 
 #ifdef DEBUG_NVR
-#define NVR_DPRINTF(fmt, args...) \
-do { printf("NVR: " fmt , ##args); } while (0)
+#define NVR_DPRINTF(fmt, ...)                                   \
+    do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0)
 #else
-#define NVR_DPRINTF(fmt, args...)
+#define NVR_DPRINTF(fmt, ...)
 #endif
 
 struct MacIONVRAMState {
-    target_phys_addr_t size;
+    uint32_t size;
     int mem_index;
+    unsigned int it_shift;
     uint8_t *data;
 };
 
@@ -75,7 +76,7 @@ static void macio_nvram_writeb (void *opaque,
 {
     MacIONVRAMState *s = opaque;
 
-    addr = (addr >> 4) & (s->size - 1);
+    addr = (addr >> s->it_shift) & (s->size - 1);
     s->data[addr] = value;
     NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
 }
@@ -85,47 +86,56 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
     MacIONVRAMState *s = opaque;
     uint32_t value;
 
-    addr = (addr >> 4) & (s->size - 1);
+    addr = (addr >> s->it_shift) & (s->size - 1);
     value = s->data[addr];
     NVR_DPRINTF("readb addr %04x val %x\n", (int)addr, value);
 
     return value;
 }
 
-static CPUWriteMemoryFunc *nvram_write[] = {
+static CPUWriteMemoryFunc * const nvram_write[] = {
     &macio_nvram_writeb,
     &macio_nvram_writeb,
     &macio_nvram_writeb,
 };
 
-static CPUReadMemoryFunc *nvram_read[] = {
+static CPUReadMemoryFunc * const nvram_read[] = {
     &macio_nvram_readb,
     &macio_nvram_readb,
     &macio_nvram_readb,
 };
 
+static const VMStateDescription vmstate_macio_nvram = {
+    .name = "macio_nvram",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField[]) {
+        VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, 0, size),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+
 static void macio_nvram_reset(void *opaque)
 {
 }
 
-MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
+MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size,
+                                   unsigned int it_shift)
 {
     MacIONVRAMState *s;
 
     s = qemu_mallocz(sizeof(MacIONVRAMState));
-    if (!s)
-        return NULL;
     s->data = qemu_mallocz(size);
-    if (!s->data) {
-        qemu_free(s);
-       return NULL;
-    }
     s->size = size;
+    s->it_shift = it_shift;
 
-    s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
+    s->mem_index = cpu_register_io_memory(nvram_read, nvram_write, s,
+                                          DEVICE_NATIVE_ENDIAN);
     *mem_index = s->mem_index;
+    vmstate_register(NULL, -1, &vmstate_macio_nvram, s);
     qemu_register_reset(macio_nvram_reset, s);
-    macio_nvram_reset(s);
 
     return s;
 }
@@ -135,7 +145,8 @@ void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
     MacIONVRAMState *s;
 
     s = opaque;
-    cpu_register_physical_memory(mem_base, s->size << 4, s->mem_index);
+    cpu_register_physical_memory(mem_base, s->size << s->it_shift,
+                                 s->mem_index);
 }
 
 /* Set up a system OpenBIOS NVRAM partition */