#include "hw/boards.h"
#include "qapi/error.h"
#include "sysemu/cpus.h"
+#include "sysemu/kvm.h"
#include "target/ppc/kvm_ppc.h"
#include "hw/ppc/ppc.h"
#include "target/ppc/mmu-hash64.h"
#include "sysemu/numa.h"
+#include "qemu/error-report.h"
+
+void spapr_cpu_parse_features(sPAPRMachineState *spapr)
+{
+ /*
+ * Backwards compatibility hack:
+ *
+ * CPUs had a "compat=" property which didn't make sense for
+ * anything except pseries. It was replaced by "max-cpu-compat"
+ * machine option. This supports old command lines like
+ * -cpu POWER8,compat=power7
+ * By stripping the compat option and applying it to the machine
+ * before passing it on to the cpu level parser.
+ */
+ gchar **inpieces;
+ int i, j;
+ gchar *compat_str = NULL;
+
+ inpieces = g_strsplit(MACHINE(spapr)->cpu_model, ",", 0);
+
+ /* inpieces[0] is the actual model string */
+ i = 1;
+ j = 1;
+ while (inpieces[i]) {
+ if (g_str_has_prefix(inpieces[i], "compat=")) {
+ /* in case of multiple compat= options */
+ g_free(compat_str);
+ compat_str = inpieces[i];
+ } else {
+ j++;
+ }
+
+ i++;
+ /* Excise compat options from list */
+ inpieces[j] = inpieces[i];
+ }
+
+ if (compat_str) {
+ char *val = compat_str + strlen("compat=");
+ gchar *newprops = g_strjoinv(",", inpieces);
+
+ object_property_set_str(OBJECT(spapr), val, "max-cpu-compat",
+ &error_fatal);
+
+ ppc_cpu_parse_features(newprops);
+ g_free(newprops);
+ } else {
+ ppc_cpu_parse_features(MACHINE(spapr)->cpu_model);
+ }
+
+ g_strfreev(inpieces);
+}
static void spapr_cpu_reset(void *opaque)
{
env->spr[SPR_HIOR] = 0;
- ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
- &error_fatal);
+ /*
+ * This is a hack for the benefit of KVM PR - it abuses the SDR1
+ * slot in kvm_sregs to communicate the userspace address of the
+ * HPT
+ */
+ if (kvm_enabled()) {
+ env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab
+ | (spapr->htab_shift - 18);
+ if (kvmppc_put_books_sregs(cpu) < 0) {
+ error_report("Unable to update SDR1 in KVM");
+ exit(1);
+ }
+ }
}
static void spapr_cpu_destroy(PowerPCCPU *cpu)
{
- sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
-
- xics_cpu_destroy(spapr->xics, cpu);
qemu_unregister_reset(spapr_cpu_reset, cpu);
}
Error **errp)
{
CPUPPCState *env = &cpu->env;
- CPUState *cs = CPU(cpu);
- int i;
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
/* Enable PAPR mode in TCG or KVM */
- cpu_ppc_set_vhyp(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
- cpu_ppc_set_papr(cpu);
-
- if (cpu->max_compat) {
- Error *local_err = NULL;
-
- ppc_set_compat(cpu, cpu->max_compat, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
- }
-
- /* Set NUMA node for the added CPUs */
- i = numa_get_node_for_cpu(cs->cpu_index);
- if (i < nb_numa_nodes) {
- cs->numa_node = i;
- }
-
- xics_cpu_setup(spapr->xics, cpu);
+ cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
qemu_register_reset(spapr_cpu_reset, cpu);
spapr_cpu_reset(cpu);
PowerPCCPU *cpu = POWERPC_CPU(cs);
spapr_cpu_destroy(cpu);
+ object_unparent(cpu->intc);
cpu_remove_sync(cs);
object_unparent(obj);
}
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
CPUState *cs = CPU(child);
PowerPCCPU *cpu = POWERPC_CPU(cs);
+ Object *obj;
object_property_set_bool(child, true, "realized", &local_err);
if (local_err) {
- error_propagate(errp, local_err);
- return;
+ goto error;
}
spapr_cpu_init(spapr, cpu, &local_err);
if (local_err) {
- error_propagate(errp, local_err);
- return;
+ goto error;
+ }
+
+ obj = object_new(spapr->icp_type);
+ object_property_add_child(child, "icp", obj, &error_abort);
+ object_unref(obj);
+ object_property_add_const_link(obj, ICP_PROP_XICS, OBJECT(spapr),
+ &error_abort);
+ object_property_add_const_link(obj, ICP_PROP_CPU, child, &error_abort);
+ object_property_set_bool(obj, true, "realized", &local_err);
+ if (local_err) {
+ goto free_icp;
}
+
+ return;
+
+free_icp:
+ object_unparent(obj);
+error:
+ error_propagate(errp, local_err);
}
static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
for (i = 0; i < cc->nr_threads; i++) {
char id[32];
CPUState *cs;
+ PowerPCCPU *cpu;
obj = sc->threads + i * size;
object_initialize(obj, size, typename);
cs = CPU(obj);
+ cpu = POWERPC_CPU(cs);
cs->cpu_index = cc->core_id + i;
+
+ /* Set NUMA node for the threads belonged to core */
+ cpu->node_id = sc->node_id;
+
snprintf(id, sizeof(id), "thread[%d]", i);
object_property_add_child(OBJECT(sc), id, obj, &local_err);
if (local_err) {
/* POWER8NVL */
"POWER8NVL_v1.0",
+
+ /* POWER9 */
+ "POWER9_v1.0",
+};
+
+static Property spapr_cpu_core_properties[] = {
+ DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
+ DEFINE_PROP_END_OF_LIST()
};
void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealizefn;
+ dc->props = spapr_cpu_core_properties;
scc->cpu_class = cpu_class_by_name(TYPE_POWERPC_CPU, data);
g_assert(scc->cpu_class);
}
projects / qemu.git / blobdiff