#include <errno.h>
#include <unistd.h>
#include <fcntl.h>
+#include <sys/stat.h>
#ifndef O_LARGEFILE
#define O_LARGEFILE 0
#endif
+#ifndef O_BINARY
+#define O_BINARY 0
+#endif
#ifdef _WIN32
-#define lseek64 lseek
+#define lseek64 _lseeki64
#endif
#include "cpu.h"
return v;
}
+static inline uint32_t cpu_to_be32(uint32_t v)
+{
+ return v;
+}
+
+static inline uint16_t cpu_to_be16(uint16_t v)
+{
+ return v;
+}
+
static inline uint32_t le32_to_cpu(uint32_t v)
{
return bswap32(v);
return bswap16(v);
}
+static inline uint32_t cpu_to_le32(uint32_t v)
+{
+ return bswap32(v);
+}
+
+static inline uint16_t cpu_to_le16(uint16_t v)
+{
+ return bswap16(v);
+}
+
#else
+
static inline uint32_t be32_to_cpu(uint32_t v)
{
return bswap32(v);
return bswap16(v);
}
+static inline uint32_t cpu_to_be32(uint32_t v)
+{
+ return bswap32(v);
+}
+
+static inline uint16_t cpu_to_be16(uint16_t v)
+{
+ return bswap16(v);
+}
+
static inline uint32_t le32_to_cpu(uint32_t v)
{
return v;
{
return v;
}
+
+static inline uint32_t cpu_to_le32(uint32_t v)
+{
+ return v;
+}
+
+static inline uint16_t cpu_to_le16(uint16_t v)
+{
+ return v;
+}
#endif
+static inline void cpu_to_le16w(uint16_t *p, uint16_t v)
+{
+ *p = cpu_to_le16(v);
+}
+
+static inline void cpu_to_le32w(uint32_t *p, uint32_t v)
+{
+ *p = cpu_to_le32(v);
+}
+
+static inline uint16_t le16_to_cpup(const uint16_t *p)
+{
+ return le16_to_cpu(*p);
+}
+
+static inline uint32_t le32_to_cpup(const uint32_t *p)
+{
+ return le32_to_cpu(*p);
+}
+
+/* unaligned versions (optimized for frequent unaligned accesses)*/
+
+#if defined(__i386__) || defined(__powerpc__)
+
+#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
+#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
+#define le16_to_cpupu(p) le16_to_cpup(p)
+#define le32_to_cpupu(p) le32_to_cpup(p)
+
+#else
+
+static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+}
+
+static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+ p1[2] = v >> 16;
+ p1[3] = v >> 24;
+}
+
+static inline uint16_t le16_to_cpupu(const uint16_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8);
+}
+
+static inline uint32_t le32_to_cpupu(const uint32_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
+}
+
+#endif
/* vl.c */
extern int reset_requested;
-typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
-typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
-
-int register_ioport_read(int start, int length, int size,
- IOPortReadFunc *func, void *opaque);
-int register_ioport_write(int start, int length, int size,
- IOPortWriteFunc *func, void *opaque);
uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
void hw_error(const char *fmt, ...);
void vm_start(void);
void vm_stop(int reason);
-/* network redirectors support */
+extern int audio_enabled;
+extern int ram_size;
+extern int bios_size;
+extern int rtc_utc;
+extern int cirrus_vga_enabled;
-#define MAX_NICS 8
+/* XXX: make it dynamic */
+#if defined (TARGET_PPC)
+#define BIOS_SIZE (512 * 1024)
+#else
+#define BIOS_SIZE 0
+#endif
-typedef struct NetDriverState {
- int fd;
- uint8_t macaddr[6];
- char ifname[16];
-} NetDriverState;
+/* keyboard/mouse support */
-extern int nb_nics;
-extern NetDriverState nd_table[MAX_NICS];
+#define MOUSE_EVENT_LBUTTON 0x01
+#define MOUSE_EVENT_RBUTTON 0x02
+#define MOUSE_EVENT_MBUTTON 0x04
+
+typedef void QEMUPutKBDEvent(void *opaque, int keycode);
+typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
-void net_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
+void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
+void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
+
+void kbd_put_keycode(int keycode);
+void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
/* async I/O support */
IOReadHandler *fd_read, void *opaque);
void qemu_del_fd_read_handler(int fd);
+/* network redirectors support */
+
+#define MAX_NICS 8
+
+typedef struct NetDriverState {
+ int index; /* index number in QEMU */
+ uint8_t macaddr[6];
+ char ifname[16];
+ void (*send_packet)(struct NetDriverState *nd,
+ const uint8_t *buf, int size);
+ void (*add_read_packet)(struct NetDriverState *nd,
+ IOCanRWHandler *fd_can_read,
+ IOReadHandler *fd_read, void *opaque);
+ /* tun specific data */
+ int fd;
+ /* slirp specific data */
+} NetDriverState;
+
+extern int nb_nics;
+extern NetDriverState nd_table[MAX_NICS];
+
+void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
+void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
+ IOReadHandler *fd_read, void *opaque);
+
/* timers */
typedef struct QEMUClock QEMUClock;
/* The real time clock should be used only for stuff which does not
change the virtual machine state, as it is run even if the virtual
- machine is stopped. The real time clock has a frequency or 1000
+ machine is stopped. The real time clock has a frequency of 1000
Hz. */
extern QEMUClock *rt_clock;
void bdrv_info(void);
BlockDriverState *bdrv_find(const char *name);
+/* ISA bus */
+
+extern target_phys_addr_t isa_mem_base;
+
+typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
+typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
+
+int register_ioport_read(int start, int length, int size,
+ IOPortReadFunc *func, void *opaque);
+int register_ioport_write(int start, int length, int size,
+ IOPortWriteFunc *func, void *opaque);
+void isa_unassign_ioport(int start, int length);
+
+/* PCI bus */
+
+extern int pci_enabled;
+
+extern target_phys_addr_t pci_mem_base;
+
+typedef struct PCIDevice PCIDevice;
+
+typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
+ uint32_t address, uint32_t data, int len);
+typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
+ uint32_t address, int len);
+typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
+ uint32_t addr, uint32_t size, int type);
+
+#define PCI_ADDRESS_SPACE_MEM 0x00
+#define PCI_ADDRESS_SPACE_IO 0x01
+#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
+
+typedef struct PCIIORegion {
+ uint32_t addr; /* current PCI mapping address. -1 means not mapped */
+ uint32_t size;
+ uint8_t type;
+ PCIMapIORegionFunc *map_func;
+} PCIIORegion;
+
+#define PCI_ROM_SLOT 6
+#define PCI_NUM_REGIONS 7
+struct PCIDevice {
+ /* PCI config space */
+ uint8_t config[256];
+
+ /* the following fields are read only */
+ int bus_num;
+ int devfn;
+ char name[64];
+ PCIIORegion io_regions[PCI_NUM_REGIONS];
+
+ /* do not access the following fields */
+ PCIConfigReadFunc *config_read;
+ PCIConfigWriteFunc *config_write;
+ int irq_index;
+};
+
+PCIDevice *pci_register_device(const char *name, int instance_size,
+ int bus_num, int devfn,
+ PCIConfigReadFunc *config_read,
+ PCIConfigWriteFunc *config_write);
+
+void pci_register_io_region(PCIDevice *pci_dev, int region_num,
+ uint32_t size, int type,
+ PCIMapIORegionFunc *map_func);
+
+void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
+
+uint32_t pci_default_read_config(PCIDevice *d,
+ uint32_t address, int len);
+void pci_default_write_config(PCIDevice *d,
+ uint32_t address, uint32_t val, int len);
+
+extern struct PIIX3State *piix3_state;
+
+void i440fx_init(void);
+void piix3_init(void);
+void pci_bios_init(void);
+void pci_info(void);
+
+/* temporary: will be moved in platform specific file */
+void pci_prep_init(void);
+void pci_pmac_init(void);
+void pci_ppc_bios_init(void);
+
/* vga.c */
#define VGA_RAM_SIZE (4096 * 1024)
}
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
- unsigned long vga_ram_offset, int vga_ram_size);
+ unsigned long vga_ram_offset, int vga_ram_size,
+ int is_pci);
void vga_update_display(void);
+void vga_invalidate_display(void);
void vga_screen_dump(const char *filename);
+/* cirrus_vga.c */
+void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+
+void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+
/* sdl.c */
void sdl_display_init(DisplayState *ds);
extern BlockDriverState *bs_table[MAX_DISKS];
-void ide_init(int iobase, int iobase2, int irq,
- BlockDriverState *hd0, BlockDriverState *hd1);
+void isa_ide_init(int iobase, int iobase2, int irq,
+ BlockDriverState *hd0, BlockDriverState *hd1);
+void pci_ide_init(BlockDriverState **hd_table);
+void pci_piix3_ide_init(BlockDriverState **hd_table);
/* oss.c */
typedef enum {
/* ne2000.c */
-void ne2000_init(int base, int irq, NetDriverState *nd);
+void isa_ne2000_init(int base, int irq, NetDriverState *nd);
+void pci_ne2000_init(NetDriverState *nd);
/* pckbd.c */
-void kbd_put_keycode(int keycode);
-
-#define MOUSE_EVENT_LBUTTON 0x01
-#define MOUSE_EVENT_RBUTTON 0x02
-#define MOUSE_EVENT_MBUTTON 0x04
-void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
-
void kbd_init(void);
/* mc146818rtc.c */
void pic_set_irq(int irq, int level);
void pic_init(void);
+uint32_t pic_intack_read(CPUState *env);
+void pic_info(void);
+void irq_info(void);
/* i8254.c */
#define PIT_FREQ 1193182
-typedef struct PITChannelState {
- int count; /* can be 65536 */
- uint16_t latched_count;
- uint8_t rw_state;
- uint8_t mode;
- uint8_t bcd; /* not supported */
- uint8_t gate; /* timer start */
- int64_t count_load_time;
- /* irq handling */
- int64_t next_transition_time;
- QEMUTimer *irq_timer;
- int irq;
-} PITChannelState;
-
-extern PITChannelState pit_channels[3];
-
-void pit_init(int base, int irq);
-void pit_set_gate(PITChannelState *s, int val);
-int pit_get_out(PITChannelState *s, int64_t current_time);
-int pit_get_out_edges(PITChannelState *s);
+typedef struct PITState PITState;
+
+PITState *pit_init(int base, int irq);
+void pit_set_gate(PITState *pit, int channel, int val);
+int pit_get_gate(PITState *pit, int channel);
+int pit_get_out(PITState *pit, int channel, int64_t current_time);
/* pc.c */
void pc_init(int ram_size, int vga_ram_size, int boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename);
+/* ppc.c */
+void ppc_init (int ram_size, int vga_ram_size, int boot_device,
+ DisplayState *ds, const char **fd_filename, int snapshot,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename);
+void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
+ DisplayState *ds, const char **fd_filename, int snapshot,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename);
+void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
+ DisplayState *ds, const char **fd_filename, int snapshot,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename);
+#ifdef TARGET_PPC
+ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
+#endif
+void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
+
+extern CPUWriteMemoryFunc *PPC_io_write[];
+extern CPUReadMemoryFunc *PPC_io_read[];
+extern int prep_enabled;
+
+/* NVRAM helpers */
+#include "hw/m48t59.h"
+
+void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
+uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
+uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
+uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
+ const unsigned char *str, uint32_t max);
+int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
+void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
+ uint32_t start, uint32_t count);
+int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
+ const unsigned char *arch,
+ uint32_t RAM_size, int boot_device,
+ uint32_t kernel_image, uint32_t kernel_size,
+ uint32_t cmdline, uint32_t cmdline_size,
+ uint32_t initrd_image, uint32_t initrd_size,
+ uint32_t NVRAM_image);
+
+/* adb.c */
+
+#define MAX_ADB_DEVICES 16
+
+typedef struct ADBDevice ADBDevice;
+
+typedef void ADBDeviceReceivePacket(ADBDevice *d, const uint8_t *buf, int len);
+
+struct ADBDevice {
+ struct ADBBusState *bus;
+ int devaddr;
+ int handler;
+ ADBDeviceReceivePacket *receive_packet;
+ void *opaque;
+};
+
+typedef struct ADBBusState {
+ ADBDevice devices[MAX_ADB_DEVICES];
+ int nb_devices;
+} ADBBusState;
+
+void adb_receive_packet(ADBBusState *s, const uint8_t *buf, int len);
+void adb_send_packet(ADBBusState *s, const uint8_t *buf, int len);
+
+ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
+ ADBDeviceReceivePacket *receive_packet,
+ void *opaque);
+void adb_kbd_init(ADBBusState *bus);
+void adb_mouse_init(ADBBusState *bus);
+
+/* cuda.c */
+
+extern ADBBusState adb_bus;
+int cuda_init(void);
+
/* monitor.c */
void monitor_init(void);
-void term_printf(const char *fmt, ...);
+void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
void term_flush(void);
void term_print_help(void);
projects / qemu.git / blobdiff