target/loongarch: Add fixed point bit instruction translation

[qemu.git] / target / loongarch / translate.c

diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index d5640d5d7979ba14878f518cc527f12c977aa88e..88afd9b3a83868334000fcb865a67622361de9ad 100644 (file)
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -147,6 +147,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext)
 #include "decode-insns.c.inc"
 #include "insn_trans/trans_arith.c.inc"
 #include "insn_trans/trans_shift.c.inc"
+#include "insn_trans/trans_bit.c.inc"
 
 static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
 {