uninorth: add to bridge category

[qemu.git] / hw / sh4 / r2d.c

diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index faa03d2069357fa8d28f01aa22a01e55396c92c4..c1ff9a0cff0aaf368cb4cd3d819e936b229528ab 100644 (file)
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -25,18 +25,18 @@
 
 #include "hw/sysbus.h"
 #include "hw/hw.h"
 
 #include "hw/sysbus.h"
 #include "hw/hw.h"

-#include "hw/sh.h"
+#include "hw/sh4/sh.h"

 #include "hw/devices.h"
 #include "sysemu/sysemu.h"
 #include "hw/boards.h"
 #include "hw/pci/pci.h"
 #include "net/net.h"
 #include "hw/devices.h"
 #include "sysemu/sysemu.h"
 #include "hw/boards.h"
 #include "hw/pci/pci.h"
 #include "net/net.h"

-#include "hw/sh7750_regs.h"
+#include "sh7750_regs.h"

 #include "hw/ide.h"
 #include "hw/loader.h"
 #include "hw/usb.h"
 #include "hw/ide.h"
 #include "hw/loader.h"
 #include "hw/usb.h"

-#include "hw/flash.h"
-#include "sysemu/blockdev.h"
+#include "hw/block/flash.h"
+#include "sysemu/block-backend.h"

 #include "exec/address-spaces.h"
 
 #define FLASH_BASE 0x00000000
 #include "exec/address-spaces.h"
 
 #define FLASH_BASE 0x00000000


@@ -127,7 +127,7 @@ static void r2d_fpga_irq_set(void *opaque, int n, int level)
     update_irl(fpga);
 }
 
     update_irl(fpga);
 }
 

-static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
+static uint64_t r2d_fpga_read(void *opaque, hwaddr addr, unsigned int size)

 {
     r2d_fpga_t *s = opaque;
 
 {
     r2d_fpga_t *s = opaque;
 


@@ -146,7 +146,7 @@ static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
 }
 
 static void
 }
 
 static void

-r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
+r2d_fpga_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size)

 {
     r2d_fpga_t *s = opaque;
 
 {
     r2d_fpga_t *s = opaque;
 


@@ -170,10 +170,10 @@ r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
 }
 
 static const MemoryRegionOps r2d_fpga_ops = {
 }
 
 static const MemoryRegionOps r2d_fpga_ops = {

-    .old_mmio = {
-        .read = { r2d_fpga_read, r2d_fpga_read, NULL, },
-        .write = { r2d_fpga_write, r2d_fpga_write, NULL, },
-    },
+    .read = r2d_fpga_read,
+    .write = r2d_fpga_write,
+    .impl.min_access_size = 2,
+    .impl.max_access_size = 2,

     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 


@@ -186,7 +186,7 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
 
     s->irl = irl;
 
 
     s->irl = irl;
 

-    memory_region_init_io(&s->iomem, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
+    memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40);

     memory_region_add_subregion(sysmem, base, &s->iomem);
     return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
 }
     memory_region_add_subregion(sysmem, base, &s->iomem);
     return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
 }


@@ -219,12 +219,12 @@ static struct QEMU_PACKED
     char kernel_cmdline[256];
 } boot_params;
 
     char kernel_cmdline[256];
 } boot_params;
 

-static void r2d_init(QEMUMachineInitArgs *args)
+static void r2d_init(MachineState *machine)

 {
 {

-    const char *cpu_model = args->cpu_model;
-    const char *kernel_filename = args->kernel_filename;
-    const char *kernel_cmdline = args->kernel_cmdline;
-    const char *initrd_filename = args->initrd_filename;
+    const char *cpu_model = machine->cpu_model;
+    const char *kernel_filename = machine->kernel_filename;
+    const char *kernel_cmdline = machine->kernel_cmdline;
+    const char *initrd_filename = machine->initrd_filename;

     SuperHCPU *cpu;
     CPUSH4State *env;
     ResetData *reset_info;
     SuperHCPU *cpu;
     CPUSH4State *env;
     ResetData *reset_info;


@@ -236,6 +236,7 @@ static void r2d_init(QEMUMachineInitArgs *args)
     DeviceState *dev;
     SysBusDevice *busdev;
     MemoryRegion *address_space_mem = get_system_memory();
     DeviceState *dev;
     SysBusDevice *busdev;
     MemoryRegion *address_space_mem = get_system_memory();

+    PCIBus *pci_bus;

 
     if (cpu_model == NULL) {
         cpu_model = "SH7751R";
 
     if (cpu_model == NULL) {
         cpu_model = "SH7751R";


@@ -254,16 +255,17 @@ static void r2d_init(QEMUMachineInitArgs *args)
     qemu_register_reset(main_cpu_reset, reset_info);
 
     /* Allocate memory space */
     qemu_register_reset(main_cpu_reset, reset_info);
 
     /* Allocate memory space */

-    memory_region_init_ram(sdram, "r2d.sdram", SDRAM_SIZE);
+    memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_fatal);

     vmstate_register_ram_global(sdram);
     memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
     /* Register peripherals */
     vmstate_register_ram_global(sdram);
     memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
     /* Register peripherals */

-    s = sh7750_init(env, address_space_mem);
+    s = sh7750_init(cpu, address_space_mem);

     irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
 
     dev = qdev_create(NULL, "sh_pci");
     busdev = SYS_BUS_DEVICE(dev);
     qdev_init_nofail(dev);
     irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
 
     dev = qdev_create(NULL, "sh_pci");
     busdev = SYS_BUS_DEVICE(dev);
     qdev_init_nofail(dev);

+    pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));

     sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
     sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
     sysbus_connect_irq(busdev, 0, irq[PCI_INTA]);
     sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
     sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
     sysbus_connect_irq(busdev, 0, irq[PCI_INTA]);


@@ -288,17 +290,18 @@ static void r2d_init(QEMUMachineInitArgs *args)
     /* onboard flash memory */
     dinfo = drive_get(IF_PFLASH, 0, 0);
     pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
     /* onboard flash memory */
     dinfo = drive_get(IF_PFLASH, 0, 0);
     pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,

-                          dinfo ? dinfo->bdrv : NULL, (16 * 1024),
-                          FLASH_SIZE >> 16,
+                          dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+                          (16 * 1024), FLASH_SIZE >> 16,

                           1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
                           0x555, 0x2aa, 0);
 
     /* NIC: rtl8139 on-board, and 2 slots. */
     for (i = 0; i < nb_nics; i++)
                           1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
                           0x555, 0x2aa, 0);
 
     /* NIC: rtl8139 on-board, and 2 slots. */
     for (i = 0; i < nb_nics; i++)

-        pci_nic_init_nofail(&nd_table[i], "rtl8139", i==0 ? "2" : NULL);
+        pci_nic_init_nofail(&nd_table[i], pci_bus,
+                            "rtl8139", i==0 ? "2" : NULL);

 
     /* USB keyboard */
 
     /* USB keyboard */

-    usbdevice_create("keyboard");
+    usb_create_simple(usb_bus_find(-1), "usb-kbd");

 
     /* Todo: register on board registers */
     memset(&boot_params, 0, sizeof(boot_params));
 
     /* Todo: register on board registers */
     memset(&boot_params, 0, sizeof(boot_params));


@@ -315,8 +318,10 @@ static void r2d_init(QEMUMachineInitArgs *args)
         }
 
         /* initialization which should be done by firmware */
         }
 
         /* initialization which should be done by firmware */

-        stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */
-        stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */
+        address_space_stl(&address_space_memory, SH7750_BCR1, 1 << 3,
+                          MEMTXATTRS_UNSPECIFIED, NULL); /* cs3 SDRAM */
+        address_space_stw(&address_space_memory, SH7750_BCR2, 3 << (3 * 2),
+                          MEMTXATTRS_UNSPECIFIED, NULL); /* cs3 32bit */

         reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */
     }
 
         reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */
     }
 


@@ -333,9 +338,9 @@ static void r2d_init(QEMUMachineInitArgs *args)
         }
 
         /* initialization which should be done by firmware */
         }
 
         /* initialization which should be done by firmware */

-        boot_params.loader_type = 1;
-        boot_params.initrd_start = INITRD_LOAD_OFFSET;
-        boot_params.initrd_size = initrd_size;
+        boot_params.loader_type = tswap32(1);
+        boot_params.initrd_start = tswap32(INITRD_LOAD_OFFSET);
+        boot_params.initrd_size = tswap32(initrd_size);

     }
 
     if (kernel_cmdline) {
     }
 
     if (kernel_cmdline) {


@@ -349,16 +354,10 @@ static void r2d_init(QEMUMachineInitArgs *args)
                        SDRAM_BASE + BOOT_PARAMS_OFFSET);
 }
 
                        SDRAM_BASE + BOOT_PARAMS_OFFSET);
 }
 

-static QEMUMachine r2d_machine = {
-    .name = "r2d",
-    .desc = "r2d-plus board",
-    .init = r2d_init,
-    DEFAULT_MACHINE_OPTIONS,
-};
-
-static void r2d_machine_init(void)
+static void r2d_machine_init(MachineClass *mc)

 {
 {

-    qemu_register_machine(&r2d_machine);
+    mc->desc = "r2d-plus board";
+    mc->init = r2d_init;

 }
 
 }
 

-machine_init(r2d_machine_init);
+DEFINE_MACHINE("r2d", r2d_machine_init)