GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+along with this program; if not, see <http://www.gnu.org/licenses/>. */
#include "dis-asm.h"
the GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* mips.h. Mips opcode list for GDB, the GNU debugger.
- Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
- Free Software Foundation, Inc.
- Contributed by Ralph Campbell and OSF
- Commented and modified by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+along with this file; see the file COPYING. If not,
+see <http://www.gnu.org/licenses/>. */
/* These are bit masks and shift counts to use to access the various
fields of an instruction. To retrieve the X field of an
"l" 32 bit floating point constant in .lit4
MDMX instruction operands (note that while these use the FP register
- fields, they accept both $fN and $vN names for the registers):
+ fields, they accept both $fN and $vN names for the registers):
"O" MDMX alignment offset (OP_*_ALN)
"Q" MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT)
- "X" MDMX destination register (OP_*_FD)
+ "X" MDMX destination register (OP_*_FD)
"Y" MDMX source register (OP_*_FS)
"Z" MDMX source register (OP_*_FT)
Because of the lookup algorithm used, entries with the same opcode
name must be contiguous.
-
+
Many instructions are short hand for other instructions (i.e., The
jal <register> instruction is short for jalr <register>). */
return c;
}
-void
+static void
set_default_mips_dis_options (struct disassemble_info *info)
{
const struct mips_arch_choice *chosen_arch;
#endif
/* Set ISA, architecture, and cp0 register names as best we can. */
-#if ! SYMTAB_AVAILABLE && 0
+#if !defined(SYMTAB_AVAILABLE) && 0
/* This is running out on a target machine, not in a host tool.
FIXME: Where does mips_target_info come from? */
target_processor = mips_target_info.processor;
#endif
}
-void
-parse_mips_dis_option (option, len)
- const char *option;
- unsigned int len;
+static void
+parse_mips_dis_option (const char *option, unsigned int len)
{
unsigned int i, optionlen, vallen;
const char *val;
lsb = ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + 32;
(*info->fprintf_func) (info->stream, "0x%x", lsb);
break;
-
+
case 'F':
msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
(*info->fprintf_func) (info->stream, "0x%x", msb - lsb + 1);
abort ();
}
}
-#endif
void
print_mips_disassembler_options (FILE *stream)
fprintf (stream, _("\n"));
}
+#endif