pci_set_irq_fn set_irq;
pci_map_irq_fn map_irq;
pci_hotplug_fn hotplug;
+ DeviceState *hotplug_qdev;
void *irq_opaque;
PCIDevice *devices[256];
PCIDevice *parent_dev;
return NULL;
}
+int pci_find_domain(const PCIBus *bus)
+{
+ PCIDevice *d;
+ struct PCIHostBus *host;
+
+ /* obtain root bus */
+ while ((d = bus->parent_dev) != NULL) {
+ bus = d->bus;
+ }
+
+ QLIST_FOREACH(host, &host_buses, next) {
+ if (host->bus == bus) {
+ return host->domain;
+ }
+ }
+
+ abort(); /* should not be reached */
+ return -1;
+}
+
void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
const char *name, int devfn_min)
{
bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0]));
}
-void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug)
+void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *qdev)
{
bus->qbus.allow_hotplug = 1;
bus->hotplug = hotplug;
+ bus->hotplug_qdev = qdev;
}
void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
static int get_pci_irq_state(QEMUFile *f, void *pv, size_t size)
{
- PCIDevice *s = container_of(pv, PCIDevice, config);
+ PCIDevice *s = container_of(pv, PCIDevice, irq_state);
uint32_t irq_state[PCI_NUM_PINS];
int i;
for (i = 0; i < PCI_NUM_PINS; ++i) {
static void put_pci_irq_state(QEMUFile *f, void *pv, size_t size)
{
int i;
- PCIDevice *s = container_of(pv, PCIDevice, config);
+ PCIDevice *s = container_of(pv, PCIDevice, irq_state);
for (i = 0; i < PCI_NUM_PINS; ++i) {
qemu_put_be32(f, pci_irq_state(s, i));
return ret;
}
-static int pci_set_default_subsystem_id(PCIDevice *pci_dev)
+static void pci_set_default_subsystem_id(PCIDevice *pci_dev)
{
- uint16_t *id;
-
- id = (void*)(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID]);
- id[0] = cpu_to_le16(pci_default_sub_vendor_id);
- id[1] = cpu_to_le16(pci_default_sub_device_id);
- return 0;
+ pci_set_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID,
+ pci_default_sub_vendor_id);
+ pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID,
+ pci_default_sub_device_id);
}
/*
}
*devfnp = slot << 3;
- return pci_find_bus(pci_find_root_bus(0), bus);
+ return pci_find_bus(pci_find_root_bus(dom), bus);
}
static void pci_init_cmask(PCIDevice *dev)
if (!bus->devices[devfn])
goto found;
}
- qemu_error("PCI: no devfn available for %s, all in use\n", name);
+ error_report("PCI: no slot/function available for %s, all in use", name);
return NULL;
found: ;
} else if (bus->devices[devfn]) {
- qemu_error("PCI: devfn %d not available for %s, in use by %s\n", devfn,
- name, bus->devices[devfn]->name);
+ error_report("PCI: slot %d function %d not available for %s, in use by %s",
+ PCI_SLOT(devfn), PCI_FUNC(devfn), name, bus->devices[devfn]->name);
return NULL;
}
pci_dev->bus = bus;
return pci_dev;
}
+static void do_pci_unregister_device(PCIDevice *pci_dev)
+{
+ qemu_free_irqs(pci_dev->irq);
+ pci_dev->bus->devices[pci_dev->devfn] = NULL;
+ pci_config_free(pci_dev);
+}
+
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
int instance_size, int devfn,
PCIConfigReadFunc *config_read,
return ret;
pci_unregister_io_regions(pci_dev);
-
- qemu_free_irqs(pci_dev->irq);
- pci_dev->bus->devices[pci_dev->devfn] = NULL;
- pci_config_free(pci_dev);
+ do_pci_unregister_device(pci_dev);
return 0;
}
static QObject *pci_get_dev_dict(PCIDevice *dev, PCIBus *bus, int bus_num)
{
- int class;
+ uint8_t type;
QObject *obj;
obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d," "'class_info': %p, 'id': %p, 'regions': %p,"
qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
}
- class = pci_get_word(dev->config + PCI_CLASS_DEVICE);
- if (class == PCI_CLASS_BRIDGE_HOST || class == PCI_CLASS_BRIDGE_PCI) {
+ type = dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION;
+ if (type == PCI_HEADER_TYPE_BRIDGE) {
QDict *qdict;
QObject *pci_bridge;
return NULL;
}
-/**
- * do_pci_info(): PCI buses and devices information
- *
- * The returned QObject is a QList of all buses. Each bus is
- * represented by a QDict, which has a key with a QList of all
- * PCI devices attached to it. Each device is represented by
- * a QDict.
- *
- * The bus QDict contains the following:
- *
- * - "bus": bus number
- * - "devices": a QList of QDicts, each QDict represents a PCI
- * device
- *
- * The PCI device QDict contains the following:
- *
- * - "bus": identical to the parent's bus number
- * - "slot": slot number
- * - "function": function number
- * - "class_info": a QDict containing:
- * - "desc": device class description (optional)
- * - "class": device class number
- * - "id": a QDict containing:
- * - "device": device ID
- * - "vendor": vendor ID
- * - "irq": device's IRQ if assigned (optional)
- * - "qdev_id": qdev id string
- * - "pci_bridge": It's a QDict, only present if this device is a
- * PCI bridge, contains:
- * - "bus": bus number
- * - "secondary": secondary bus number
- * - "subordinate": subordinate bus number
- * - "io_range": a QDict with memory range information
- * - "memory_range": a QDict with memory range information
- * - "prefetchable_range": a QDict with memory range information
- * - "devices": a QList of PCI devices if there's any attached (optional)
- * - "regions": a QList of QDicts, each QDict represents a
- * memory region of this device
- *
- * The memory range QDict contains the following:
- *
- * - "base": base memory address
- * - "limit": limit value
- *
- * The region QDict can be an I/O region or a memory region,
- * an I/O region QDict contains the following:
- *
- * - "type": "io"
- * - "bar": BAR number
- * - "address": memory address
- * - "size": memory size
- *
- * A memory region QDict contains the following:
- *
- * - "type": "memory"
- * - "bar": BAR number
- * - "address": memory address
- * - "size": memory size
- * - "mem_type_64": true or false
- * - "prefetch": true or false
- */
void do_pci_info(Monitor *mon, QObject **ret_data)
{
QList *bus_list;
bus = pci_get_bus_devfn(&devfn, devaddr);
if (!bus) {
- qemu_error("Invalid PCI device address %s for device %s\n",
- devaddr, pci_nic_names[i]);
+ error_report("Invalid PCI device address %s for device %s",
+ devaddr, pci_nic_names[i]);
return NULL;
}
pci_dev = pci_create(bus, devfn, pci_nic_names[i]);
dev = &pci_dev->qdev;
- if (nd->name)
- dev->id = qemu_strdup(nd->name);
qdev_set_nic_properties(dev, nd);
if (qdev_init(dev) < 0)
return NULL;
PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
{
- PCIBus *sec, *ret;
+ PCIBus *sec;
- if (!bus)
+ if (!bus) {
return NULL;
+ }
if (pci_bus_num(bus) == bus_num) {
return bus;
}
/* try child bus */
- QLIST_FOREACH(sec, &bus->child, sibling) {
- if (!bus->parent_dev /* pci host bridge */
- || (pci_bus_num(sec) >= bus_num &&
- bus_num <= bus->parent_dev->config[PCI_SUBORDINATE_BUS]) ) {
- ret = pci_find_bus(sec, bus_num);
- if (ret) {
- return ret;
+ if (!bus->parent_dev /* host pci bridge */ ||
+ (bus->parent_dev->config[PCI_SECONDARY_BUS] < bus_num &&
+ bus_num <= bus->parent_dev->config[PCI_SUBORDINATE_BUS])) {
+ for (; bus; bus = sec) {
+ QLIST_FOREACH(sec, &bus->child, sibling) {
+ assert(sec->parent_dev);
+ if (sec->parent_dev->config[PCI_SECONDARY_BUS] == bus_num) {
+ return sec;
+ }
+ if (sec->parent_dev->config[PCI_SECONDARY_BUS] < bus_num &&
+ bus_num <= sec->parent_dev->config[PCI_SUBORDINATE_BUS]) {
+ break;
+ }
}
}
}
if (pci_dev == NULL)
return -1;
rc = info->init(pci_dev);
- if (rc != 0)
+ if (rc != 0) {
+ do_pci_unregister_device(pci_dev);
return rc;
+ }
/* rom loading */
if (pci_dev->romfile == NULL && info->romfile != NULL)
pci_add_option_rom(pci_dev);
if (qdev->hotplugged)
- bus->hotplug(pci_dev, 1);
+ bus->hotplug(bus->hotplug_qdev, pci_dev, 1);
return 0;
}
{
PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev);
- dev->bus->hotplug(dev, 0);
+ dev->bus->hotplug(dev->bus->hotplug_qdev, dev, 0);
return 0;
}
size = get_image_size(path);
if (size < 0) {
- qemu_error("%s: failed to find romfile \"%s\"\n", __FUNCTION__,
- pdev->romfile);
+ error_report("%s: failed to find romfile \"%s\"",
+ __FUNCTION__, pdev->romfile);
return -1;
}
if (size & (size - 1)) {
}
/* Reserve space and add capability to the linked list in pci config space */
-int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+int pci_add_capability_at_offset(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t offset, uint8_t size)
{
- uint8_t offset = pci_find_space(pdev, size);
uint8_t *config = pdev->config + offset;
- if (!offset)
- return -ENOSPC;
config[PCI_CAP_LIST_ID] = cap_id;
config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
pdev->config[PCI_CAPABILITY_LIST] = offset;
return offset;
}
+/* Find and reserve space and add capability to the linked list
+ * in pci config space */
+int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pci_find_space(pdev, size);
+ if (!offset) {
+ return -ENOSPC;
+ }
+ return pci_add_capability_at_offset(pdev, cap_id, offset, size);
+}
+
/* Unlink capability from the pci config space. */
void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
{