replace spinlock by QemuMutex.

[qemu.git] / user-exec.c

diff --git a/user-exec.c b/user-exec.c
index be6bc4f64c9444c5aaeb5c0c897198b07fe026a9..8ad89a466b1b557d2a89d66030c04000c8e20395 100644 (file)
--- a/user-exec.c
+++ b/user-exec.c
@@ -18,9 +18,11 @@
  */
 #include "config.h"
 #include "cpu.h"
  */
 #include "config.h"
 #include "cpu.h"

-#include "dyngen-exec.h"
-#include "disas.h"
+#include "disas/disas.h"

 #include "tcg.h"
 #include "tcg.h"

+#include "qemu/bitops.h"
+#include "exec/cpu_ldst.h"
+#include "translate-all.h"

 
 #undef EAX
 #undef ECX
 
 #undef EAX
 #undef ECX


@@ -38,19 +40,22 @@
 
 //#define DEBUG_SIGNAL
 
 
 //#define DEBUG_SIGNAL
 

-static void exception_action(CPUArchState *env1)
+static void exception_action(CPUState *cpu)

 {
 #if defined(TARGET_I386)
 {
 #if defined(TARGET_I386)

-    raise_exception_err_env(env1, env1->exception_index, env1->error_code);
+    X86CPU *x86_cpu = X86_CPU(cpu);
+    CPUX86State *env1 = &x86_cpu->env;
+
+    raise_exception_err(env1, cpu->exception_index, env1->error_code);

 #else
 #else

-    cpu_loop_exit(env1);
+    cpu_loop_exit(cpu);

 #endif
 }
 
 /* exit the current TB from a signal handler. The host registers are
    restored in a state compatible with the CPU emulator
  */
 #endif
 }
 
 /* exit the current TB from a signal handler. The host registers are
    restored in a state compatible with the CPU emulator
  */

-void cpu_resume_from_signal(CPUArchState *env1, void *puc)
+void cpu_resume_from_signal(CPUState *cpu, void *puc)

 {
 #ifdef __linux__
     struct ucontext *uc = puc;
 {
 #ifdef __linux__
     struct ucontext *uc = puc;


@@ -58,10 +63,6 @@ void cpu_resume_from_signal(CPUArchState *env1, void *puc)
     struct sigcontext *uc = puc;
 #endif
 
     struct sigcontext *uc = puc;
 #endif
 

-    env = env1;
-
-    /* XXX: restore cpu registers saved in host registers */
-

     if (puc) {
         /* XXX: use siglongjmp ? */
 #ifdef __linux__
     if (puc) {
         /* XXX: use siglongjmp ? */
 #ifdef __linux__


@@ -74,8 +75,8 @@ void cpu_resume_from_signal(CPUArchState *env1, void *puc)
         sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL);
 #endif
     }
         sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL);
 #endif
     }

-    env->exception_index = -1;
-    longjmp(env->jmp_env, 1);
+    cpu->exception_index = -1;
+    siglongjmp(cpu->jmp_env, 1);

 }
 
 /* 'pc' is the host PC at which the exception was raised. 'address' is
 }
 
 /* 'pc' is the host PC at which the exception was raised. 'address' is


@@ -86,23 +87,29 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned long address,
                                     int is_write, sigset_t *old_set,
                                     void *puc)
 {
                                     int is_write, sigset_t *old_set,
                                     void *puc)
 {

-    TranslationBlock *tb;
+    CPUState *cpu;
+    CPUClass *cc;

     int ret;
 
     int ret;
 

-    if (cpu_single_env) {
-        env = cpu_single_env; /* XXX: find a correct solution for multithread */
-    }

 #if defined(DEBUG_SIGNAL)
 #if defined(DEBUG_SIGNAL)

-    qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
-                pc, address, is_write, *(unsigned long *)old_set);
+    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
+           pc, address, is_write, *(unsigned long *)old_set);

 #endif
     /* XXX: locking issue */
 #endif
     /* XXX: locking issue */

-    if (is_write && page_unprotect(h2g(address), pc, puc)) {
+    if (is_write && h2g_valid(address)
+        && page_unprotect(h2g(address), pc, puc)) {

         return 1;
     }
 
         return 1;
     }
 

+    /* Convert forcefully to guest address space, invalid addresses
+       are still valid segv ones */
+    address = h2g_nocheck(address);
+
+    cpu = current_cpu;
+    cc = CPU_GET_CLASS(cpu);

     /* see if it is an MMU fault */
     /* see if it is an MMU fault */

-    ret = cpu_handle_mmu_fault(env, address, is_write, MMU_USER_IDX);
+    g_assert(cc->handle_mmu_fault);
+    ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX);

     if (ret < 0) {
         return 0; /* not an MMU fault */
     }
     if (ret < 0) {
         return 0; /* not an MMU fault */
     }


@@ -110,17 +117,12 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned long address,
         return 1; /* the MMU fault was handled without causing real CPU fault */
     }
     /* now we have a real cpu fault */
         return 1; /* the MMU fault was handled without causing real CPU fault */
     }
     /* now we have a real cpu fault */

-    tb = tb_find_pc(pc);
-    if (tb) {
-        /* the PC is inside the translated code. It means that we have
-           a virtual CPU fault */
-        cpu_restore_state(tb, env, pc);
-    }
+    cpu_restore_state(cpu, pc);

 
     /* we restore the process signal mask as the sigreturn should
        do it (XXX: use sigsetjmp) */
     sigprocmask(SIG_SETMASK, old_set, NULL);
 
     /* we restore the process signal mask as the sigreturn should
        do it (XXX: use sigsetjmp) */
     sigprocmask(SIG_SETMASK, old_set, NULL);

-    exception_action(env);
+    exception_action(cpu);

 
     /* never comes here */
     return 1;
 
     /* never comes here */
     return 1;


@@ -403,6 +405,10 @@ int cpu_signal_handler(int host_signum, void *pinfo,
     struct sigcontext *uc = puc;
     unsigned long pc = uc->sc_pc;
     void *sigmask = (void *)(long)uc->sc_mask;
     struct sigcontext *uc = puc;
     unsigned long pc = uc->sc_pc;
     void *sigmask = (void *)(long)uc->sc_mask;

+#elif defined(__NetBSD__)
+    ucontext_t *uc = puc;
+    unsigned long pc = _UC_MACHINE_PC(uc);
+    void *sigmask = (void *)&uc->uc_sigmask;

 #endif
 #endif
 
 #endif
 #endif
 


@@ -440,26 +446,67 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 
 #elif defined(__arm__)
 
 
 #elif defined(__arm__)
 

+#if defined(__NetBSD__)
+#include <ucontext.h>
+#endif
+

 int cpu_signal_handler(int host_signum, void *pinfo,
                        void *puc)
 {
     siginfo_t *info = pinfo;
 int cpu_signal_handler(int host_signum, void *pinfo,
                        void *puc)
 {
     siginfo_t *info = pinfo;

+#if defined(__NetBSD__)
+    ucontext_t *uc = puc;
+#else

     struct ucontext *uc = puc;
     struct ucontext *uc = puc;

+#endif

     unsigned long pc;
     int is_write;
 
     unsigned long pc;
     int is_write;
 

-#if (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
+#if defined(__NetBSD__)
+    pc = uc->uc_mcontext.__gregs[_REG_R15];
+#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))

     pc = uc->uc_mcontext.gregs[R15];
 #else
     pc = uc->uc_mcontext.arm_pc;
 #endif
     pc = uc->uc_mcontext.gregs[R15];
 #else
     pc = uc->uc_mcontext.arm_pc;
 #endif

-    /* XXX: compute is_write */
-    is_write = 0;
+
+    /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
+     * later processor; on v5 we will always report this as a read).
+     */
+    is_write = extract32(uc->uc_mcontext.error_code, 11, 1);

     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
                              is_write,
                              &uc->uc_sigmask, puc);
 }
 
     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
                              is_write,
                              &uc->uc_sigmask, puc);
 }
 

+#elif defined(__aarch64__)
+
+int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
+{
+    siginfo_t *info = pinfo;
+    struct ucontext *uc = puc;
+    uintptr_t pc = uc->uc_mcontext.pc;
+    uint32_t insn = *(uint32_t *)pc;
+    bool is_write;
+
+    /* XXX: need kernel patch to get write flag faster.  */
+    is_write = (   (insn & 0xbfff0000) == 0x0c000000   /* C3.3.1 */
+                || (insn & 0xbfe00000) == 0x0c800000   /* C3.3.2 */
+                || (insn & 0xbfdf0000) == 0x0d000000   /* C3.3.3 */
+                || (insn & 0xbfc00000) == 0x0d800000   /* C3.3.4 */
+                || (insn & 0x3f400000) == 0x08000000   /* C3.3.6 */
+                || (insn & 0x3bc00000) == 0x39000000   /* C3.3.13 */
+                || (insn & 0x3fc00000) == 0x3d800000   /* ... 128bit */
+                /* Ingore bits 10, 11 & 21, controlling indexing.  */
+                || (insn & 0x3bc00000) == 0x38000000   /* C3.3.8-12 */
+                || (insn & 0x3fe00000) == 0x3c800000   /* ... 128bit */
+                /* Ignore bits 23 & 24, controlling indexing.  */
+                || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
+
+    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
+                             is_write, &uc->uc_sigmask, puc);
+}
+

 #elif defined(__mc68000)
 
 int cpu_signal_handler(int host_signum, void *pinfo,
 #elif defined(__mc68000)
 
 int cpu_signal_handler(int host_signum, void *pinfo,


@@ -587,7 +634,7 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 int cpu_signal_handler(int host_signum, void *pinfo,
                        void *puc)
 {
 int cpu_signal_handler(int host_signum, void *pinfo,
                        void *puc)
 {

-    struct siginfo *info = pinfo;
+    siginfo_t *info = pinfo;

     struct ucontext *uc = puc;
     unsigned long pc = uc->uc_mcontext.sc_iaoq[0];
     uint32_t insn = *(uint32_t *)pc;
     struct ucontext *uc = puc;
     unsigned long pc = uc->uc_mcontext.sc_iaoq[0];
     uint32_t insn = *(uint32_t *)pc;