#include <inttypes.h>
#include "qemu-common.h"
-#include "qemu-timer.h"
-#include "watchdog.h"
-#include "hw.h"
-#include "pci.h"
+#include "qemu/timer.h"
+#include "hw/watchdog.h"
+#include "hw/hw.h"
+#include "hw/pci/pci.h"
/*#define I6300ESB_DEBUG 1*/
#define i6300esb_debug(fs,...)
#endif
-#ifndef PCI_DEVICE_ID_INTEL_ESB_9
-#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
-#endif
-
/* PCI configuration registers */
#define ESB_CONFIG_REG 0x60 /* Config register */
#define ESB_LOCK_REG 0x68 /* WDT lock register */
/* Device state. */
struct I6300State {
PCIDevice dev;
+ MemoryRegion io_mem;
int reboot_enabled; /* "Reboot" on timer expiry. The real action
* performed depends on the -watchdog-action
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
- qemu_mod_timer(d->timer, qemu_get_clock(vm_clock) + timeout);
+ qemu_mod_timer(d->timer, qemu_get_clock_ns(vm_clock) + timeout);
}
/* This is called when the guest disables the watchdog. */
qemu_del_timer(d->timer);
}
-static void i6300esb_reset(I6300State *d)
+static void i6300esb_reset(DeviceState *dev)
{
- /* XXX We should probably reset other parts of the state here,
- * but we should also reset our state on general machine reset
- * too. For now just disable the timer so it doesn't fire
- * again after the reboot.
- */
+ PCIDevice *pdev = PCI_DEVICE(dev);
+ I6300State *d = DO_UPCAST(I6300State, dev, pdev);
+
+ i6300esb_debug("I6300State = %p\n", d);
+
i6300esb_disable_timer(d);
+
+ /* NB: Don't change d->previous_reboot_flag in this function. */
+
+ d->reboot_enabled = 1;
+ d->clock_scale = CLOCK_SCALE_1KHZ;
+ d->int_type = INT_TYPE_IRQ;
+ d->free_run = 0;
+ d->locked = 0;
+ d->enabled = 0;
+ d->timer1_preload = 0xfffff;
+ d->timer2_preload = 0xfffff;
+ d->stage = 1;
+ d->unlock_state = 0;
}
/* This function is called when the watchdog expires. Note that
if (d->reboot_enabled) {
d->previous_reboot_flag = 1;
watchdog_perform_action(); /* This reboots, exits, etc */
- i6300esb_reset(d);
+ i6300esb_reset(&d->dev.qdev);
}
/* In "free running mode" we start stage 1 again. */
}
}
-static uint32_t i6300esb_mem_readb(void *vp, target_phys_addr_t addr)
+static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr)
{
i6300esb_debug ("addr = %x\n", (int) addr);
return 0;
}
-static uint32_t i6300esb_mem_readw(void *vp, target_phys_addr_t addr)
+static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr)
{
uint32_t data = 0;
I6300State *d = vp;
return data;
}
-static uint32_t i6300esb_mem_readl(void *vp, target_phys_addr_t addr)
+static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr)
{
i6300esb_debug("addr = %x\n", (int) addr);
return 0;
}
-static void i6300esb_mem_writeb(void *vp, target_phys_addr_t addr, uint32_t val)
+static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val)
{
I6300State *d = vp;
d->unlock_state = 2;
}
-static void i6300esb_mem_writew(void *vp, target_phys_addr_t addr, uint32_t val)
+static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val)
{
I6300State *d = vp;
}
}
-static void i6300esb_mem_writel(void *vp, target_phys_addr_t addr, uint32_t val)
+static void i6300esb_mem_writel(void *vp, hwaddr addr, uint32_t val)
{
I6300State *d = vp;
}
}
-static void i6300esb_map(PCIDevice *dev, int region_num,
- uint32_t addr, uint32_t size, int type)
-{
- static CPUReadMemoryFunc * const mem_read[3] = {
- i6300esb_mem_readb,
- i6300esb_mem_readw,
- i6300esb_mem_readl,
- };
- static CPUWriteMemoryFunc * const mem_write[3] = {
- i6300esb_mem_writeb,
- i6300esb_mem_writew,
- i6300esb_mem_writel,
- };
- I6300State *d = DO_UPCAST(I6300State, dev, dev);
- int io_mem;
-
- i6300esb_debug("addr = %x, size = %x, type = %d\n", addr, size, type);
-
- io_mem = cpu_register_io_memory(mem_read, mem_write, d);
- cpu_register_physical_memory (addr, 0x10, io_mem);
- /* qemu_register_coalesced_mmio (addr, 0x10); ? */
-}
+static const MemoryRegionOps i6300esb_ops = {
+ .old_mmio = {
+ .read = {
+ i6300esb_mem_readb,
+ i6300esb_mem_readw,
+ i6300esb_mem_readl,
+ },
+ .write = {
+ i6300esb_mem_writeb,
+ i6300esb_mem_writew,
+ i6300esb_mem_writel,
+ },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
static const VMStateDescription vmstate_i6300esb = {
.name = "i6300esb_wdt",
static int i6300esb_init(PCIDevice *dev)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
- uint8_t *pci_conf;
- d->reboot_enabled = 1;
- d->clock_scale = CLOCK_SCALE_1KHZ;
- d->int_type = INT_TYPE_IRQ;
- d->free_run = 0;
- d->locked = 0;
- d->enabled = 0;
- d->timer = qemu_new_timer(vm_clock, i6300esb_timer_expired, d);
- d->timer1_preload = 0xfffff;
- d->timer2_preload = 0xfffff;
- d->stage = 1;
- d->unlock_state = 0;
+ i6300esb_debug("I6300State = %p\n", d);
+
+ d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
- pci_conf = d->dev.config;
- pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
- pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_ESB_9);
- pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER);
- pci_conf[0x0e] = 0x00;
+ memory_region_init_io(&d->io_mem, &i6300esb_ops, d, "i6300esb", 0x10);
+ pci_register_bar(&d->dev, 0, 0, &d->io_mem);
+ /* qemu_register_coalesced_mmio (addr, 0x10); ? */
- pci_register_bar(&d->dev, 0, 0x10,
- PCI_ADDRESS_SPACE_MEM, i6300esb_map);
+ return 0;
+}
- vmstate_register(-1, &vmstate_i6300esb, d);
+static void i6300esb_exit(PCIDevice *dev)
+{
+ I6300State *d = DO_UPCAST(I6300State, dev, dev);
- return 0;
+ memory_region_destroy(&d->io_mem);
}
static WatchdogTimerModel model = {
.wdt_description = "Intel 6300ESB",
};
-static PCIDeviceInfo i6300esb_info = {
- .qdev.name = "i6300esb",
- .qdev.size = sizeof(I6300State),
- .config_read = i6300esb_config_read,
- .config_write = i6300esb_config_write,
- .init = i6300esb_init,
+static void i6300esb_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->config_read = i6300esb_config_read;
+ k->config_write = i6300esb_config_write;
+ k->init = i6300esb_init;
+ k->exit = i6300esb_exit;
+ k->vendor_id = PCI_VENDOR_ID_INTEL;
+ k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
+ k->class_id = PCI_CLASS_SYSTEM_OTHER;
+ dc->reset = i6300esb_reset;
+ dc->vmsd = &vmstate_i6300esb;
+}
+
+static const TypeInfo i6300esb_info = {
+ .name = "i6300esb",
+ .parent = TYPE_PCI_DEVICE,
+ .instance_size = sizeof(I6300State),
+ .class_init = i6300esb_class_init,
};
-static void i6300esb_register_devices(void)
+static void i6300esb_register_types(void)
{
watchdog_add_model(&model);
- pci_qdev_register(&i6300esb_info);
+ type_register_static(&i6300esb_info);
}
-device_init(i6300esb_register_devices);
+type_init(i6300esb_register_types)
projects / qemu.git / blobdiff