static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)
{
int mmu_idx, page_index, pd;
+ void *p;
page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = cpu_mmu_index(env1);
cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
#endif
}
- return addr + env1->tlb_table[mmu_idx][page_index].addend - (unsigned long)phys_ram_base;
+ p = (void *)(unsigned long)addr
+ + env1->tlb_table[mmu_idx][page_index].addend;
+ return qemu_ram_addr_from_host(p);
}
/* Deterministic execution requires that IO only be performed on the last
}
#endif
-#ifdef USE_KQEMU
+#ifdef CONFIG_KQEMU
#define KQEMU_MODIFY_PAGE_MASK (0xff & ~(VGA_DIRTY_FLAG | CODE_DIRTY_FLAG))
#define MSR_QPI_COMMBASE 0xfabe0010
extern uint32_t kqemu_comm_base;
+extern ram_addr_t kqemu_phys_ram_size;
+extern uint8_t *kqemu_phys_ram_base;
+
static inline int kqemu_is_ok(CPUState *env)
{
return(env->kqemu_enabled &&
typedef void (CPUDebugExcpHandler)(CPUState *env);
CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler);
+
+/* vl.c */
+extern int singlestep;
+
#endif