/*
* Arm PrimeCell PL110 Color LCD Controller
*
- * Copyright (c) 2005-2006 CodeSourcery.
+ * Copyright (c) 2005-2009 CodeSourcery.
* Written by Paul Brook
*
- * This code is licenced under the GNU LGPL
+ * This code is licensed under the GNU LGPL
*/
-#include "vl.h"
+#include "sysbus.h"
+#include "console.h"
+#include "framebuffer.h"
#define PL110_CR_EN 0x001
#define PL110_CR_BGR 0x100
BPP_4,
BPP_8,
BPP_16,
- BPP_32
+ BPP_32,
+ BPP_16_565, /* PL111 only */
+ BPP_12 /* PL111 only */
+};
+
+
+/* The Versatile/PB uses a slightly modified PL110 controller. */
+enum pl110_version
+{
+ PL110,
+ PL110_VERSATILE,
+ PL111
};
typedef struct {
- uint32_t base;
+ SysBusDevice busdev;
+ MemoryRegion iomem;
DisplayState *ds;
- /* The Versatile/PB uses a slightly modified PL110 controller. */
- int versatile;
+
+ int version;
uint32_t timing[4];
uint32_t cr;
uint32_t upbase;
int rows;
enum pl110_bppmode bpp;
int invalidate;
+ uint32_t mux_ctrl;
uint32_t pallette[256];
uint32_t raw_pallette[128];
qemu_irq irq;
} pl110_state;
+static int vmstate_pl110_post_load(void *opaque, int version_id);
+
+static const VMStateDescription vmstate_pl110 = {
+ .name = "pl110",
+ .version_id = 2,
+ .minimum_version_id = 1,
+ .post_load = vmstate_pl110_post_load,
+ .fields = (VMStateField[]) {
+ VMSTATE_INT32(version, pl110_state),
+ VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
+ VMSTATE_UINT32(cr, pl110_state),
+ VMSTATE_UINT32(upbase, pl110_state),
+ VMSTATE_UINT32(lpbase, pl110_state),
+ VMSTATE_UINT32(int_status, pl110_state),
+ VMSTATE_UINT32(int_mask, pl110_state),
+ VMSTATE_INT32(cols, pl110_state),
+ VMSTATE_INT32(rows, pl110_state),
+ VMSTATE_UINT32(bpp, pl110_state),
+ VMSTATE_INT32(invalidate, pl110_state),
+ VMSTATE_UINT32_ARRAY(pallette, pl110_state, 256),
+ VMSTATE_UINT32_ARRAY(raw_pallette, pl110_state, 128),
+ VMSTATE_UINT32_V(mux_ctrl, pl110_state, 2),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static const unsigned char pl110_id[] =
{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
#define pl110_versatile_id pl110_id
#endif
-static inline uint32_t rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
-{
- return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
-}
-
-static inline uint32_t rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
-{
- return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
-}
-
-static inline uint32_t rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
-{
- return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
-}
-
-static inline uint32_t rgb_to_pixel24(unsigned int r, unsigned int g, unsigned b)
-{
- return (r << 16) | (g << 8) | b;
-}
+static const unsigned char pl111_id[] = {
+ 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
+};
-static inline uint32_t rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
-{
- return (r << 16) | (g << 8) | b;
-}
+/* Indexed by pl110_version */
+static const unsigned char *idregs[] = {
+ pl110_id,
+ pl110_versatile_id,
+ pl111_id
+};
-typedef void (*drawfn)(uint32_t *, uint8_t *, const uint8_t *, int);
+#include "pixel_ops.h"
#define BITS 8
#include "pl110_template.h"
pl110_state *s = (pl110_state *)opaque;
drawfn* fntable;
drawfn fn;
- uint32_t *pallette;
- uint32_t addr;
- uint32_t base;
int dest_width;
int src_width;
- uint8_t *dest;
- uint8_t *src;
- int first, last = 0;
- int dirty, new_dirty;
- int i;
int bpp_offset;
+ int first;
+ int last;
if (!pl110_enabled(s))
return;
- switch (s->ds->depth) {
+ switch (ds_get_bits_per_pixel(s->ds)) {
case 0:
return;
case 8:
if (s->cr & PL110_CR_BGR)
bpp_offset = 0;
else
- bpp_offset = 18;
+ bpp_offset = 24;
+
+ if ((s->version != PL111) && (s->bpp == BPP_16)) {
+ /* The PL110's native 16 bit mode is 5551; however
+ * most boards with a PL110 implement an external
+ * mux which allows bits to be reshuffled to give
+ * 565 format. The mux is typically controlled by
+ * an external system register.
+ * This is controlled by a GPIO input pin
+ * so boards can wire it up to their register.
+ *
+ * The PL111 straightforwardly implements both
+ * 5551 and 565 under control of the bpp field
+ * in the LCDControl register.
+ */
+ switch (s->mux_ctrl) {
+ case 3: /* 565 BGR */
+ bpp_offset = (BPP_16_565 - BPP_16);
+ break;
+ case 1: /* 5551 */
+ break;
+ case 0: /* 888; also if we have loaded vmstate from an old version */
+ case 2: /* 565 RGB */
+ default:
+ /* treat as 565 but honour BGR bit */
+ bpp_offset += (BPP_16_565 - BPP_16);
+ break;
+ }
+ }
if (s->cr & PL110_CR_BEBO)
- fn = fntable[s->bpp + 6 + bpp_offset];
+ fn = fntable[s->bpp + 8 + bpp_offset];
else if (s->cr & PL110_CR_BEPO)
- fn = fntable[s->bpp + 12 + bpp_offset];
+ fn = fntable[s->bpp + 16 + bpp_offset];
else
fn = fntable[s->bpp + bpp_offset];
case BPP_8:
break;
case BPP_16:
+ case BPP_16_565:
+ case BPP_12:
src_width <<= 1;
break;
case BPP_32:
break;
}
dest_width *= s->cols;
- pallette = s->pallette;
- base = s->upbase;
- /* HACK: Arm aliases physical memory at 0x80000000. */
- if (base > 0x80000000)
- base -= 0x80000000;
- src = phys_ram_base + base;
- dest = s->ds->data;
- first = -1;
- addr = base;
-
- dirty = cpu_physical_memory_get_dirty(addr, VGA_DIRTY_FLAG);
- new_dirty = dirty;
- for (i = 0; i < s->rows; i++) {
- if ((addr & ~TARGET_PAGE_MASK) + src_width >= TARGET_PAGE_SIZE) {
- uint32_t tmp;
- new_dirty = 0;
- for (tmp = 0; tmp < src_width; tmp += TARGET_PAGE_SIZE) {
- new_dirty |= cpu_physical_memory_get_dirty(addr + tmp,
- VGA_DIRTY_FLAG);
- }
- }
-
- if (dirty || new_dirty || s->invalidate) {
- fn(pallette, dest, src, s->cols);
- if (first == -1)
- first = i;
- last = i;
- }
- dirty = new_dirty;
- addr += src_width;
- dest += dest_width;
- src += src_width;
+ first = 0;
+ framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
+ s->upbase, s->cols, s->rows,
+ src_width, dest_width, 0,
+ s->invalidate,
+ fn, s->pallette,
+ &first, &last);
+ if (first >= 0) {
+ dpy_update(s->ds, 0, first, s->cols, last - first + 1);
}
- if (first < 0)
- return;
-
s->invalidate = 0;
- cpu_physical_memory_reset_dirty(base + first * src_width,
- base + (last + 1) * src_width,
- VGA_DIRTY_FLAG);
- dpy_update(s->ds, 0, first, s->cols, last - first + 1);
}
static void pl110_invalidate_display(void * opaque)
{
pl110_state *s = (pl110_state *)opaque;
s->invalidate = 1;
+ if (pl110_enabled(s)) {
+ qemu_console_resize(s->ds, s->cols, s->rows);
+ }
}
static void pl110_update_pallette(pl110_state *s, int n)
b = (raw & 0x1f) << 3;
/* The I bit is ignored. */
raw >>= 6;
- switch (s->ds->depth) {
+ switch (ds_get_bits_per_pixel(s->ds)) {
case 8:
s->pallette[n] = rgb_to_pixel8(r, g, b);
break;
{
if (width != s->cols || height != s->rows) {
if (pl110_enabled(s)) {
- dpy_resize(s->ds, width, height);
+ qemu_console_resize(s->ds, width, height);
}
}
s->cols = width;
/* TODO: Implement interrupts. */
}
-static uint32_t pl110_read(void *opaque, target_phys_addr_t offset)
+static uint64_t pl110_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
pl110_state *s = (pl110_state *)opaque;
- offset -= s->base;
if (offset >= 0xfe0 && offset < 0x1000) {
- if (s->versatile)
- return pl110_versatile_id[(offset - 0xfe0) >> 2];
- else
- return pl110_id[(offset - 0xfe0) >> 2];
+ return idregs[s->version][(offset - 0xfe0) >> 2];
}
if (offset >= 0x200 && offset < 0x400) {
return s->raw_pallette[(offset - 0x200) >> 2];
case 5: /* LCDLPBASE */
return s->lpbase;
case 6: /* LCDIMSC */
- if (s->versatile)
- return s->cr;
+ if (s->version != PL110) {
+ return s->cr;
+ }
return s->int_mask;
case 7: /* LCDControl */
- if (s->versatile)
- return s->int_mask;
+ if (s->version != PL110) {
+ return s->int_mask;
+ }
return s->cr;
case 8: /* LCDRIS */
return s->int_status;
case 12: /* LCDLPCURR */
return s->lpbase;
default:
- cpu_abort (cpu_single_env, "pl110_read: Bad offset %x\n", (int)offset);
+ hw_error("pl110_read: Bad offset %x\n", (int)offset);
return 0;
}
}
static void pl110_write(void *opaque, target_phys_addr_t offset,
- uint32_t val)
+ uint64_t val, unsigned size)
{
pl110_state *s = (pl110_state *)opaque;
int n;
/* For simplicity invalidate the display whenever a control register
- is writen to. */
+ is written to. */
s->invalidate = 1;
- offset -= s->base;
if (offset >= 0x200 && offset < 0x400) {
/* Pallette. */
n = (offset - 0x200) >> 2;
s->lpbase = val;
break;
case 6: /* LCDIMSC */
- if (s->versatile)
+ if (s->version != PL110) {
goto control;
+ }
imsc:
s->int_mask = val;
pl110_update(s);
break;
case 7: /* LCDControl */
- if (s->versatile)
+ if (s->version != PL110) {
goto imsc;
+ }
control:
s->cr = val;
s->bpp = (val >> 1) & 7;
if (pl110_enabled(s)) {
- dpy_resize(s->ds, s->cols, s->rows);
+ qemu_console_resize(s->ds, s->cols, s->rows);
}
break;
case 10: /* LCDICR */
pl110_update(s);
break;
default:
- cpu_abort (cpu_single_env, "pl110_write: Bad offset %x\n", (int)offset);
+ hw_error("pl110_write: Bad offset %x\n", (int)offset);
}
}
-static CPUReadMemoryFunc *pl110_readfn[] = {
- pl110_read,
- pl110_read,
- pl110_read
+static const MemoryRegionOps pl110_ops = {
+ .read = pl110_read,
+ .write = pl110_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUWriteMemoryFunc *pl110_writefn[] = {
- pl110_write,
- pl110_write,
- pl110_write
+static void pl110_mux_ctrl_set(void *opaque, int line, int level)
+{
+ pl110_state *s = (pl110_state *)opaque;
+ s->mux_ctrl = level;
+}
+
+static int vmstate_pl110_post_load(void *opaque, int version_id)
+{
+ pl110_state *s = opaque;
+ /* Make sure we redraw, and at the right size */
+ pl110_invalidate_display(s);
+ return 0;
+}
+
+static int pl110_init(SysBusDevice *dev)
+{
+ pl110_state *s = FROM_SYSBUS(pl110_state, dev);
+
+ memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000);
+ sysbus_init_mmio(dev, &s->iomem);
+ sysbus_init_irq(dev, &s->irq);
+ qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
+ s->ds = graphic_console_init(pl110_update_display,
+ pl110_invalidate_display,
+ NULL, NULL, s);
+ return 0;
+}
+
+static int pl110_versatile_init(SysBusDevice *dev)
+{
+ pl110_state *s = FROM_SYSBUS(pl110_state, dev);
+ s->version = PL110_VERSATILE;
+ return pl110_init(dev);
+}
+
+static int pl111_init(SysBusDevice *dev)
+{
+ pl110_state *s = FROM_SYSBUS(pl110_state, dev);
+ s->version = PL111;
+ return pl110_init(dev);
+}
+
+static void pl110_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl110_init;
+ dc->no_user = 1;
+ dc->vmsd = &vmstate_pl110;
+}
+
+static TypeInfo pl110_info = {
+ .name = "pl110",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(pl110_state),
+ .class_init = pl110_class_init,
};
-void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
- int versatile)
+static void pl110_versatile_class_init(ObjectClass *klass, void *data)
{
- pl110_state *s;
- int iomemtype;
-
- s = (pl110_state *)qemu_mallocz(sizeof(pl110_state));
- iomemtype = cpu_register_io_memory(0, pl110_readfn,
- pl110_writefn, s);
- cpu_register_physical_memory(base, 0x00001000, iomemtype);
- s->base = base;
- s->ds = ds;
- s->versatile = versatile;
- s->irq = irq;
- graphic_console_init(ds, pl110_update_display, pl110_invalidate_display,
- NULL, s);
- /* ??? Save/restore. */
- return s;
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl110_versatile_init;
+ dc->no_user = 1;
+ dc->vmsd = &vmstate_pl110;
}
+
+static TypeInfo pl110_versatile_info = {
+ .name = "pl110_versatile",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(pl110_state),
+ .class_init = pl110_versatile_class_init,
+};
+
+static void pl111_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl111_init;
+ dc->no_user = 1;
+ dc->vmsd = &vmstate_pl110;
+}
+
+static TypeInfo pl111_info = {
+ .name = "pl111",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(pl110_state),
+ .class_init = pl111_class_init,
+};
+
+static void pl110_register_types(void)
+{
+ type_register_static(&pl110_info);
+ type_register_static(&pl110_versatile_info);
+ type_register_static(&pl111_info);
+}
+
+type_init(pl110_register_types)
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