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[qemu.git] / hw / etraxfs_dma.c
diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index a7e547c08a7d811d80bbc549fce3444e1b8d6234..1bc5f4170ea9be1cb2ab6fb576010372f785dee0 100644 (file)
--- a/hw/etraxfs_dma.c
+++ b/hw/etraxfs_dma.c
@@ -165,11 +165,9 @@ enum dma_ch_state
 
 struct fs_dma_channel
 {
-       int regmap;
        qemu_irq *irq;
        struct etraxfs_dma_client *client;
 
-
        /* Internal status.  */
        int stream_cmd_src;
        enum dma_ch_state state;
@@ -187,8 +185,8 @@ struct fs_dma_channel
 
 struct fs_dma_ctrl
 {
+       int map;
        CPUState *env;
-       target_phys_addr_t base;
 
        int nr_channels;
        struct fs_dma_channel *channels;
@@ -212,10 +210,10 @@ static inline int channel_en(struct fs_dma_ctrl *ctrl, int c)
                && ctrl->channels[c].client;
 }
 
-static inline int fs_channel(target_phys_addr_t base, target_phys_addr_t addr)
+static inline int fs_channel(target_phys_addr_t addr)
 {
        /* Every channel has a 0x2000 ctrl register map.  */
-       return (addr - base) >> 13;
+       return addr >> 13;
 }
 
 #ifdef USE_THIS_DEAD_CODE
@@ -318,6 +316,8 @@ static inline void channel_start(struct fs_dma_ctrl *ctrl, int c)
                ctrl->channels[c].state = RUNNING;
        } else
                printf("WARNING: starting DMA ch %d with no client\n", c);
+
+        qemu_bh_schedule_idle(ctrl->bh);
 }
 
 static void channel_continue(struct fs_dma_ctrl *ctrl, int c)
@@ -391,13 +391,16 @@ static void channel_update_irq(struct fs_dma_ctrl *ctrl, int c)
                 qemu_irq_lower(ctrl->channels[c].irq[0]);
 }
 
-static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
+static int channel_out_run(struct fs_dma_ctrl *ctrl, int c)
 {
        uint32_t len;
        uint32_t saved_data_buf;
        unsigned char buf[2 * 1024];
 
-       while (ctrl->channels[c].eol != 1) {
+       if (ctrl->channels[c].eol)
+               return 0;
+
+       do {
                saved_data_buf = channel_reg(ctrl, c, RW_SAVED_DATA_BUF);
 
                D(printf("ch=%d buf=%x after=%x saved_data_buf=%x\n",
@@ -406,7 +409,8 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
                         (uint32_t)ctrl->channels[c].current_d.after,
                         saved_data_buf));
 
-               len = (uint32_t)ctrl->channels[c].current_d.after;
+               len = (uint32_t)(unsigned long)
+                       ctrl->channels[c].current_d.after;
                len -= saved_data_buf;
 
                if (len > sizeof buf)
@@ -426,8 +430,8 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
 
                saved_data_buf += len;
 
-               if (saved_data_buf ==
-                   (uint32_t)ctrl->channels[c].current_d.after) {
+               if (saved_data_buf == (uint32_t)(unsigned long)
+                               ctrl->channels[c].current_d.after) {
                        /* Done. Step to next.  */
                        if (ctrl->channels[c].current_d.out_eop) {
                                /* TODO: signal eop to the client.  */
@@ -451,7 +455,8 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
                                channel_stop(ctrl, c);
                        } else {
                                ctrl->channels[c].regs[RW_SAVED_DATA] =
-                                       (uint32_t)ctrl->channels[c].current_d.next;
+                                       (uint32_t)(unsigned long)ctrl->
+                                               channels[c].current_d.next;
                                /* Load new descriptor.  */
                                channel_load_d(ctrl, c);
                                saved_data_buf = (uint32_t)(unsigned long)
@@ -464,7 +469,8 @@ static void channel_out_run(struct fs_dma_ctrl *ctrl, int c)
                        D(dump_d(c, &ctrl->channels[c].current_d));
                }
                ctrl->channels[c].regs[RW_SAVED_DATA_BUF] = saved_data_buf;
-       }
+       } while (!ctrl->channels[c].eol);
+       return 1;
 }
 
 static int channel_in_process(struct fs_dma_ctrl *ctrl, int c, 
@@ -477,7 +483,7 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
                return 0;
 
        saved_data_buf = channel_reg(ctrl, c, RW_SAVED_DATA_BUF);
-       len = (uint32_t)ctrl->channels[c].current_d.after;
+       len = (uint32_t)(unsigned long)ctrl->channels[c].current_d.after;
        len -= saved_data_buf;
        
        if (len > buflen)
@@ -487,7 +493,7 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
        saved_data_buf += len;
 
        if (saved_data_buf ==
-           (uint32_t)ctrl->channels[c].current_d.after
+           (uint32_t)(unsigned long)ctrl->channels[c].current_d.after
            || eop) {
                uint32_t r_intr = ctrl->channels[c].regs[R_INTR];
 
@@ -524,10 +530,11 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
                        channel_stop(ctrl, c);
                } else {
                        ctrl->channels[c].regs[RW_SAVED_DATA] =
-                               (uint32_t)ctrl->channels[c].current_d.next;
+                               (uint32_t)(unsigned long)ctrl->
+                                       channels[c].current_d.next;
                        /* Load new descriptor.  */
                        channel_load_d(ctrl, c);
-                       saved_data_buf = (uint32_t)
+                       saved_data_buf = (uint32_t)(unsigned long)
                                ctrl->channels[c].current_d.buf;
                }
        }
@@ -536,11 +543,14 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
        return len;
 }
 
-static inline void channel_in_run(struct fs_dma_ctrl *ctrl, int c)
+static inline int channel_in_run(struct fs_dma_ctrl *ctrl, int c)
 {
-       if (ctrl->channels[c].client->client.pull)
+       if (ctrl->channels[c].client->client.pull) {
                ctrl->channels[c].client->client.pull(
                        ctrl->channels[c].client->client.opaque);
+               return 1;
+       } else
+               return 0;
 }
 
 static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
@@ -559,9 +569,9 @@ dma_readl (void *opaque, target_phys_addr_t addr)
        int c;
        uint32_t r = 0;
 
-       /* Make addr relative to this instances base.  */
-       c = fs_channel(ctrl->base, addr);
-       addr &= 0x1fff;
+       /* Make addr relative to this channel and bounded to nr regs.  */
+       c = fs_channel(addr);
+       addr &= 0xff;
        switch (addr)
        {
                case RW_STAT:
@@ -605,9 +615,9 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
         struct fs_dma_ctrl *ctrl = opaque;
        int c;
 
-        /* Make addr relative to this instances base.  */
-       c = fs_channel(ctrl->base, addr);
-        addr &= 0x1fff;
+        /* Make addr relative to this channel and bounded to nr regs.  */
+       c = fs_channel(addr);
+        addr &= 0xff;
         switch (addr)
        {
                case RW_DATA:
@@ -670,7 +680,7 @@ static CPUWriteMemoryFunc *dma_write[] = {
        &dma_writel,
 };
 
-void etraxfs_dmac_run(void *opaque)
+static int etraxfs_dmac_run(void *opaque)
 {
        struct fs_dma_ctrl *ctrl = opaque;
        int i;
@@ -682,13 +692,14 @@ void etraxfs_dmac_run(void *opaque)
        {
                if (ctrl->channels[i].state == RUNNING)
                {
-                       p++;
-                       if (ctrl->channels[i].input)
-                               channel_in_run(ctrl, i);
-                       else
-                               channel_out_run(ctrl, i);
+                       if (ctrl->channels[i].input) {
+                               p += channel_in_run(ctrl, i);
+                       } else {
+                               p += channel_out_run(ctrl, i);
+                       }
                }
        }
+       return p;
 }
 
 int etraxfs_dmac_input(struct etraxfs_dma_client *client, 
@@ -719,42 +730,34 @@ void etraxfs_dmac_connect_client(void *opaque, int c,
 static void DMA_run(void *opaque)
 {
     struct fs_dma_ctrl *etraxfs_dmac = opaque;
+    int p = 1;
+
     if (vm_running)
-        etraxfs_dmac_run(etraxfs_dmac);
-    qemu_bh_schedule_idle(etraxfs_dmac->bh);
+        p = etraxfs_dmac_run(etraxfs_dmac);
+
+    if (p)
+        qemu_bh_schedule_idle(etraxfs_dmac->bh);
 }
 
 void *etraxfs_dmac_init(CPUState *env, 
                        target_phys_addr_t base, int nr_channels)
 {
        struct fs_dma_ctrl *ctrl = NULL;
-       int i;
 
        ctrl = qemu_mallocz(sizeof *ctrl);
        if (!ctrl)
                return NULL;
 
         ctrl->bh = qemu_bh_new(DMA_run, ctrl);
-        qemu_bh_schedule_idle(ctrl->bh);
 
-       ctrl->base = base;
        ctrl->env = env;
        ctrl->nr_channels = nr_channels;
        ctrl->channels = qemu_mallocz(sizeof ctrl->channels[0] * nr_channels);
        if (!ctrl->channels)
                goto err;
 
-       for (i = 0; i < nr_channels; i++)
-       {
-               ctrl->channels[i].regmap = cpu_register_io_memory(0,
-                                                                 dma_read, 
-                                                                 dma_write, 
-                                                                 ctrl);
-               cpu_register_physical_memory (base + i * 0x2000,
-                                             sizeof ctrl->channels[i].regs, 
-                                             ctrl->channels[i].regmap);
-       }
-
+       ctrl->map = cpu_register_io_memory(0, dma_read, dma_write, ctrl);
+       cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
        return ctrl;
   err:
        qemu_free(ctrl->channels);
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