#include "cpu.h"
#include "disas/disas.h"
#include "tcg.h"
+#include "qemu/bitops.h"
#undef EAX
#undef ECX
return 1;
}
+ /* Convert forcefully to guest address space, invalid addresses
+ are still valid segv ones */
+ address = h2g_nocheck(address);
+
env = current_cpu->env_ptr;
/* see if it is an MMU fault */
ret = cpu_handle_mmu_fault(env, address, is_write, MMU_USER_IDX);
#else
pc = uc->uc_mcontext.arm_pc;
#endif
- /* XXX: compute is_write */
- is_write = 0;
+
+ /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
+ * later processor; on v5 we will always report this as a read).
+ */
+ is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
return handle_cpu_signal(pc, (unsigned long)info->si_addr,
is_write,
&uc->uc_sigmask, puc);