SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).

[qemu.git] / hw / sh_timer.c

diff --git a/hw/sh_timer.c b/hw/sh_timer.c
index 4557a8354c07025fd1c8e5bb0817bf78fadf5b97..c5c45f50d2e511986bf7887277dfd73b71d6c225 100644 (file)
--- a/hw/sh_timer.c
+++ b/hw/sh_timer.c
@@ -320,6 +320,7 @@ void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq,
                                    ch2_irq0); /* ch2_irq1 not supported */
     iomemtype = cpu_register_io_memory(0, tmu012_readfn,
                                        tmu012_writefn, s);
-    cpu_register_physical_memory(base, 0x00001000, iomemtype);
+    cpu_register_physical_memory(P4ADDR(base), 0x00001000, iomemtype);
+    cpu_register_physical_memory(A7ADDR(base), 0x00001000, iomemtype);
     /* ??? Save/restore.  */
 }