256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
};
-CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
- const unsigned int pci_irq_nrs[4], int do_init,
- const char *cpu_model)
+CPUState *ppc440ep_init(MemoryRegion *address_space_mem, ram_addr_t *ram_size,
+ PCIBus **pcip, const unsigned int pci_irq_nrs[4],
+ int do_init, const char *cpu_model)
{
MemoryRegion *ram_memories
= g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
return env;