target-sparc: Use cpu_loop_exit_restore from helper_check_ieee_exceptions

[qemu.git] / target-lm32 / translate.c

diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 81a204f5cfddb974a8c3e50f395478bea2636618..2d8caebbfc9d5ac222c1198144cc0610e13b327f 100644 (file)
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -17,9 +17,11 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 

+#include "qemu/osdep.h"

 #include "cpu.h"
 #include "disas/disas.h"
 #include "exec/helper-proto.h"
 #include "cpu.h"
 #include "disas/disas.h"
 #include "exec/helper-proto.h"

+#include "exec/exec-all.h"

 #include "tcg-op.h"
 
 #include "exec/cpu_ldst.h"
 #include "tcg-op.h"
 
 #include "exec/cpu_ldst.h"


@@ -28,6 +30,7 @@
 #include "exec/helper-gen.h"
 
 #include "trace-tcg.h"
 #include "exec/helper-gen.h"
 
 #include "trace-tcg.h"

+#include "exec/log.h"

 
 
 #define DISAS_LM32 1
 
 
 #define DISAS_LM32 1


@@ -42,7 +45,7 @@
 
 #define MEM_INDEX 0
 
 
 #define MEM_INDEX 0
 

-static TCGv_ptr cpu_env;
+static TCGv_env cpu_env;

 static TCGv cpu_R[32];
 static TCGv cpu_pc;
 static TCGv cpu_ie;
 static TCGv cpu_R[32];
 static TCGv cpu_pc;
 static TCGv cpu_ie;


@@ -131,16 +134,25 @@ static inline void t_gen_illegal_insn(DisasContext *dc)
     gen_helper_ill(cpu_env);
 }
 
     gen_helper_ill(cpu_env);
 }
 

-static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
+static inline bool use_goto_tb(DisasContext *dc, target_ulong dest)

 {
 {

-    TranslationBlock *tb;
+    if (unlikely(dc->singlestep_enabled)) {
+        return false;
+    }

 
 

-    tb = dc->tb;
-    if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) &&
-            likely(!dc->singlestep_enabled)) {
+#ifndef CONFIG_USER_ONLY
+    return (dc->tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK);
+#else
+    return true;
+#endif
+}
+
+static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
+{
+    if (use_goto_tb(dc, dest)) {

         tcg_gen_goto_tb(n);
         tcg_gen_movi_tl(cpu_pc, dest);
         tcg_gen_goto_tb(n);
         tcg_gen_movi_tl(cpu_pc, dest);

-        tcg_gen_exit_tb((uintptr_t)tb + n);
+        tcg_gen_exit_tb((uintptr_t)dc->tb + n);

     } else {
         tcg_gen_movi_tl(cpu_pc, dest);
         if (dc->singlestep_enabled) {
     } else {
         tcg_gen_movi_tl(cpu_pc, dest);
         if (dc->singlestep_enabled) {


@@ -1005,10 +1017,6 @@ static const DecoderInfo decinfo[] = {
 
 static inline void decode(DisasContext *dc, uint32_t ir)
 {
 
 static inline void decode(DisasContext *dc, uint32_t ir)
 {

-    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
-        tcg_gen_debug_insn_start(dc->pc);
-    }
-

     dc->ir = ir;
     LOG_DIS("%8.8x\t", dc->ir);
 
     dc->ir = ir;
     LOG_DIS("%8.8x\t", dc->ir);
 


@@ -1036,32 +1044,13 @@ static inline void decode(DisasContext *dc, uint32_t ir)
     decinfo[dc->opcode](dc);
 }
 
     decinfo[dc->opcode](dc);
 }
 

-static void check_breakpoint(CPULM32State *env, DisasContext *dc)
-{
-    CPUState *cs = CPU(lm32_env_get_cpu(env));
-    CPUBreakpoint *bp;
-
-    if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
-        QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
-            if (bp->pc == dc->pc) {
-                tcg_gen_movi_tl(cpu_pc, dc->pc);
-                t_gen_raise_exception(dc, EXCP_DEBUG);
-                dc->is_jmp = DISAS_UPDATE;
-             }
-        }
-    }
-}
-

 /* generate intermediate code for basic block 'tb'.  */
 /* generate intermediate code for basic block 'tb'.  */

-static inline
-void gen_intermediate_code_internal(LM32CPU *cpu,
-                                    TranslationBlock *tb, bool search_pc)
+void gen_intermediate_code(CPULM32State *env, struct TranslationBlock *tb)

 {
 {

+    LM32CPU *cpu = lm32_env_get_cpu(env);

     CPUState *cs = CPU(cpu);
     CPUState *cs = CPU(cpu);

-    CPULM32State *env = &cpu->env;

     struct DisasContext ctx, *dc = &ctx;
     uint32_t pc_start;
     struct DisasContext ctx, *dc = &ctx;
     uint32_t pc_start;

-    int j, lj;

     uint32_t next_page_start;
     int num_insns;
     int max_insns;
     uint32_t next_page_start;
     int num_insns;
     int max_insns;


@@ -1083,41 +1072,41 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
     }
 
     next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
     }
 
     next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;

-    lj = -1;

     num_insns = 0;
     max_insns = tb->cflags & CF_COUNT_MASK;
     if (max_insns == 0) {
         max_insns = CF_COUNT_MASK;
     }
     num_insns = 0;
     max_insns = tb->cflags & CF_COUNT_MASK;
     if (max_insns == 0) {
         max_insns = CF_COUNT_MASK;
     }

+    if (max_insns > TCG_MAX_INSNS) {
+        max_insns = TCG_MAX_INSNS;
+    }

 
     gen_tb_start(tb);
     do {
 
     gen_tb_start(tb);
     do {

-        check_breakpoint(env, dc);
-
-        if (search_pc) {
-            j = tcg_op_buf_count();
-            if (lj < j) {
-                lj++;
-                while (lj < j) {
-                    tcg_ctx.gen_opc_instr_start[lj++] = 0;
-                }
-            }
-            tcg_ctx.gen_opc_pc[lj] = dc->pc;
-            tcg_ctx.gen_opc_instr_start[lj] = 1;
-            tcg_ctx.gen_opc_icount[lj] = num_insns;
+        tcg_gen_insn_start(dc->pc);
+        num_insns++;
+
+        if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
+            tcg_gen_movi_tl(cpu_pc, dc->pc);
+            t_gen_raise_exception(dc, EXCP_DEBUG);
+            dc->is_jmp = DISAS_UPDATE;
+            /* The address covered by the breakpoint must be included in
+               [tb->pc, tb->pc + tb->size) in order to for it to be
+               properly cleared -- thus we increment the PC here so that
+               the logic setting tb->size below does the right thing.  */
+            dc->pc += 4;
+            break;

         }
 
         /* Pretty disas.  */
         LOG_DIS("%8.8x:\t", dc->pc);
 
         }
 
         /* Pretty disas.  */
         LOG_DIS("%8.8x:\t", dc->pc);
 

-        if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
+        if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {

             gen_io_start();
         }
 
         decode(dc, cpu_ldl_code(env, dc->pc));
         dc->pc += 4;
             gen_io_start();
         }
 
         decode(dc, cpu_ldl_code(env, dc->pc));
         dc->pc += 4;

-        num_insns++;
-

     } while (!dc->is_jmp
          && !tcg_op_buf_full()
          && !cs->singlestep_enabled
     } while (!dc->is_jmp
          && !tcg_op_buf_full()
          && !cs->singlestep_enabled


@@ -1154,37 +1143,20 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
 
     gen_tb_end(tb, num_insns);
 
 
     gen_tb_end(tb, num_insns);
 

-    if (search_pc) {
-        j = tcg_op_buf_count();
-        lj++;
-        while (lj <= j) {
-            tcg_ctx.gen_opc_instr_start[lj++] = 0;
-        }
-    } else {
-        tb->size = dc->pc - pc_start;
-        tb->icount = num_insns;
-    }
+    tb->size = dc->pc - pc_start;
+    tb->icount = num_insns;

 
 #ifdef DEBUG_DISAS
 
 #ifdef DEBUG_DISAS

-    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+        && qemu_log_in_addr_range(pc_start)) {

         qemu_log("\n");
         qemu_log("\n");

-        log_target_disas(env, pc_start, dc->pc - pc_start, 0);
+        log_target_disas(cs, pc_start, dc->pc - pc_start, 0);

         qemu_log("\nisize=%d osize=%d\n",
                  dc->pc - pc_start, tcg_op_buf_count());
     }
 #endif
 }
 
         qemu_log("\nisize=%d osize=%d\n",
                  dc->pc - pc_start, tcg_op_buf_count());
     }
 #endif
 }
 

-void gen_intermediate_code(CPULM32State *env, struct TranslationBlock *tb)
-{
-    gen_intermediate_code_internal(lm32_env_get_cpu(env), tb, false);
-}
-
-void gen_intermediate_code_pc(CPULM32State *env, struct TranslationBlock *tb)
-{
-    gen_intermediate_code_internal(lm32_env_get_cpu(env), tb, true);
-}
-

 void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
                          int flags)
 {
 void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
                          int flags)
 {


@@ -1219,9 +1191,10 @@ void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
     cpu_fprintf(f, "\n\n");
 }
 
     cpu_fprintf(f, "\n\n");
 }
 

-void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb, int pc_pos)
+void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb,
+                          target_ulong *data)

 {
 {

-    env->pc = tcg_ctx.gen_opc_pc[pc_pos];
+    env->pc = data[0];

 }
 
 void lm32_translate_init(void)
 }
 
 void lm32_translate_init(void)


@@ -1229,50 +1202,51 @@ void lm32_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");

+    tcg_ctx.tcg_env = cpu_env;

 
     for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
 
     for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {

-        cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+        cpu_R[i] = tcg_global_mem_new(cpu_env,

                           offsetof(CPULM32State, regs[i]),
                           regnames[i]);
     }
 
     for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {
                           offsetof(CPULM32State, regs[i]),
                           regnames[i]);
     }
 
     for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {

-        cpu_bp[i] = tcg_global_mem_new(TCG_AREG0,
+        cpu_bp[i] = tcg_global_mem_new(cpu_env,

                           offsetof(CPULM32State, bp[i]),
                           regnames[32+i]);
     }
 
     for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {
                           offsetof(CPULM32State, bp[i]),
                           regnames[32+i]);
     }
 
     for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {

-        cpu_wp[i] = tcg_global_mem_new(TCG_AREG0,
+        cpu_wp[i] = tcg_global_mem_new(cpu_env,

                           offsetof(CPULM32State, wp[i]),
                           regnames[36+i]);
     }
 
                           offsetof(CPULM32State, wp[i]),
                           regnames[36+i]);
     }
 

-    cpu_pc = tcg_global_mem_new(TCG_AREG0,
+    cpu_pc = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, pc),
                     "pc");
                     offsetof(CPULM32State, pc),
                     "pc");

-    cpu_ie = tcg_global_mem_new(TCG_AREG0,
+    cpu_ie = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, ie),
                     "ie");
                     offsetof(CPULM32State, ie),
                     "ie");

-    cpu_icc = tcg_global_mem_new(TCG_AREG0,
+    cpu_icc = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, icc),
                     "icc");
                     offsetof(CPULM32State, icc),
                     "icc");

-    cpu_dcc = tcg_global_mem_new(TCG_AREG0,
+    cpu_dcc = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, dcc),
                     "dcc");
                     offsetof(CPULM32State, dcc),
                     "dcc");

-    cpu_cc = tcg_global_mem_new(TCG_AREG0,
+    cpu_cc = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, cc),
                     "cc");
                     offsetof(CPULM32State, cc),
                     "cc");

-    cpu_cfg = tcg_global_mem_new(TCG_AREG0,
+    cpu_cfg = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, cfg),
                     "cfg");
                     offsetof(CPULM32State, cfg),
                     "cfg");

-    cpu_eba = tcg_global_mem_new(TCG_AREG0,
+    cpu_eba = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, eba),
                     "eba");
                     offsetof(CPULM32State, eba),
                     "eba");

-    cpu_dc = tcg_global_mem_new(TCG_AREG0,
+    cpu_dc = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, dc),
                     "dc");
                     offsetof(CPULM32State, dc),
                     "dc");

-    cpu_deba = tcg_global_mem_new(TCG_AREG0,
+    cpu_deba = tcg_global_mem_new(cpu_env,

                     offsetof(CPULM32State, deba),
                     "deba");
 }
                     offsetof(CPULM32State, deba),
                     "deba");
 }