uint64_t frac;
#if defined(TARGET_SPARC) || defined(TARGET_M68K)
+ /* !snan_bit_is_one, set all bits */
frac = (1ULL << DECOMPOSED_BINARY_POINT) - 1;
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
- defined(TARGET_S390X) || defined(TARGET_RISCV)
+#elif defined(TARGET_I386) || defined(TARGET_X86_64) \
+ || defined(TARGET_MICROBLAZE)
+ /* !snan_bit_is_one, set sign and msb */
frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
+ sign = 1;
#elif defined(TARGET_HPPA)
+ /* snan_bit_is_one, set msb-1. */
frac = 1ULL << (DECOMPOSED_BINARY_POINT - 2);
#else
+ /* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
+ * S390, SH4, TriCore, and Xtensa. I cannot find documentation
+ * for Unicore32; the choice from the original commit is unchanged.
+ * Our other supported targets, CRIS, LM32, Moxie, Nios2, and Tile,
+ * do not have floating-point.
+ */
if (snan_bit_is_one(status)) {
+ /* set all bits other than msb */
frac = (1ULL << (DECOMPOSED_BINARY_POINT - 1)) - 1;
} else {
-#if defined(TARGET_MIPS)
- frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
-#else
+ /* set msb */
frac = 1ULL << (DECOMPOSED_BINARY_POINT - 1);
- sign = 1;
-#endif
}
#endif
return a;
}
-/*----------------------------------------------------------------------------
-| The pattern for a default generated half-precision NaN.
-*----------------------------------------------------------------------------*/
-float16 float16_default_nan(float_status *status)
-{
-#if defined(TARGET_ARM)
- return const_float16(0x7E00);
-#else
- if (snan_bit_is_one(status)) {
- return const_float16(0x7DFF);
- } else {
-#if defined(TARGET_MIPS)
- return const_float16(0x7E00);
-#else
- return const_float16(0xFE00);
-#endif
- }
-#endif
-}
-
-/*----------------------------------------------------------------------------
-| The pattern for a default generated single-precision NaN.
-*----------------------------------------------------------------------------*/
-float32 float32_default_nan(float_status *status)
-{
-#if defined(TARGET_SPARC) || defined(TARGET_M68K)
- return const_float32(0x7FFFFFFF);
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
- defined(TARGET_XTENSA) || defined(TARGET_S390X) || \
- defined(TARGET_TRICORE) || defined(TARGET_RISCV)
- return const_float32(0x7FC00000);
-#elif defined(TARGET_HPPA)
- return const_float32(0x7FA00000);
-#else
- if (snan_bit_is_one(status)) {
- return const_float32(0x7FBFFFFF);
- } else {
-#if defined(TARGET_MIPS)
- return const_float32(0x7FC00000);
-#else
- return const_float32(0xFFC00000);
-#endif
- }
-#endif
-}
-
-/*----------------------------------------------------------------------------
-| The pattern for a default generated double-precision NaN.
-*----------------------------------------------------------------------------*/
-float64 float64_default_nan(float_status *status)
-{
-#if defined(TARGET_SPARC) || defined(TARGET_M68K)
- return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
- defined(TARGET_S390X) || defined(TARGET_RISCV)
- return const_float64(LIT64(0x7FF8000000000000));
-#elif defined(TARGET_HPPA)
- return const_float64(LIT64(0x7FF4000000000000));
-#else
- if (snan_bit_is_one(status)) {
- return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
- } else {
-#if defined(TARGET_MIPS)
- return const_float64(LIT64(0x7FF8000000000000));
-#else
- return const_float64(LIT64(0xFFF8000000000000));
-#endif
- }
-#endif
-}
-
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/
floatx80 floatx80_default_nan(float_status *status)
{
floatx80 r;
+
+ /* None of the targets that have snan_bit_is_one use floatx80. */
+ assert(!snan_bit_is_one(status));
#if defined(TARGET_M68K)
r.low = LIT64(0xFFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
#else
- if (snan_bit_is_one(status)) {
- r.low = LIT64(0xBFFFFFFFFFFFFFFF);
- r.high = 0x7FFF;
- } else {
- r.low = LIT64(0xC000000000000000);
- r.high = 0xFFFF;
- }
+ /* X86 */
+ r.low = LIT64(0xC000000000000000);
+ r.high = 0xFFFF;
#endif
return r;
}
const floatx80 floatx80_infinity
= make_floatx80_init(floatx80_infinity_high, floatx80_infinity_low);
-/*----------------------------------------------------------------------------
-| The pattern for a default generated quadruple-precision NaN.
-*----------------------------------------------------------------------------*/
-float128 float128_default_nan(float_status *status)
-{
- float128 r;
-
- if (snan_bit_is_one(status)) {
- r.low = LIT64(0xFFFFFFFFFFFFFFFF);
- r.high = LIT64(0x7FFF7FFFFFFFFFFF);
- } else {
- r.low = LIT64(0x0000000000000000);
-#if defined(TARGET_S390X) || defined(TARGET_PPC) || defined(TARGET_RISCV)
- r.high = LIT64(0x7FFF800000000000);
-#else
- r.high = LIT64(0xFFFF800000000000);
-#endif
- }
- return r;
-}
-
/*----------------------------------------------------------------------------
| Raises the exceptions specified by `flags'. Floating-point traps can be
| defined here if desired. It is currently not possible for such a trap
#endif
}
-/*----------------------------------------------------------------------------
-| Returns a quiet NaN from a signalling NaN for the half-precision
-| floating point value `a'.
-*----------------------------------------------------------------------------*/
-
-float16 float16_silence_nan(float16 a, float_status *status)
-{
-#ifdef NO_SIGNALING_NANS
- g_assert_not_reached();
-#else
- if (snan_bit_is_one(status)) {
- return float16_default_nan(status);
- } else {
- return a | (1 << 9);
- }
-#endif
-}
-
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is a quiet
| NaN; otherwise returns 0.
#endif
}
-/*----------------------------------------------------------------------------
-| Returns a quiet NaN from a signalling NaN for the single-precision
-| floating point value `a'.
-*----------------------------------------------------------------------------*/
-
-float32 float32_silence_nan(float32 a, float_status *status)
-{
-#ifdef NO_SIGNALING_NANS
- g_assert_not_reached();
-#else
- if (snan_bit_is_one(status)) {
-# ifdef TARGET_HPPA
- a &= ~0x00400000;
- a |= 0x00200000;
- return a;
-# else
- return float32_default_nan(status);
-# endif
- } else {
- return a | (1 << 22);
- }
-#endif
-}
-
/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point NaN
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
#endif
}
-/*----------------------------------------------------------------------------
-| Returns a quiet NaN from a signalling NaN for the double-precision
-| floating point value `a'.
-*----------------------------------------------------------------------------*/
-
-float64 float64_silence_nan(float64 a, float_status *status)
-{
-#ifdef NO_SIGNALING_NANS
- g_assert_not_reached();
-#else
- if (snan_bit_is_one(status)) {
-# ifdef TARGET_HPPA
- a &= ~0x0008000000000000ULL;
- a |= 0x0004000000000000ULL;
- return a;
-# else
- return float64_default_nan(status);
-# endif
- } else {
- return a | LIT64(0x0008000000000000);
- }
-#endif
-}
-
-
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point NaN
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
{
-#ifdef NO_SIGNALING_NANS
- g_assert_not_reached();
-#else
- if (snan_bit_is_one(status)) {
- return floatx80_default_nan(status);
- } else {
- a.low |= LIT64(0xC000000000000000);
- return a;
- }
-#endif
+ /* None of the targets that have snan_bit_is_one use floatx80. */
+ assert(!snan_bit_is_one(status));
+ a.low |= LIT64(0xC000000000000000);
+ return a;
}
/*----------------------------------------------------------------------------
projects / qemu.git / blobdiff