hw/intc/arm_gicv3_kvm: Implement pending table save

[qemu.git] / hw / intc / i8259_common.c

diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c
index 803d037f68be9899161b09f79a455b45560dfc18..c2fd563b5b42d1eca7da182cc7a08d238169ec1c 100644 (file)
--- a/hw/intc/i8259_common.c
+++ b/hw/intc/i8259_common.c
@@ -22,6 +22,7 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */

+#include "qemu/osdep.h"

 #include "hw/i386/pc.h"
 #include "hw/isa/i8259_internal.h"
 
 #include "hw/i386/pc.h"
 #include "hw/isa/i8259_internal.h"
 


@@ -69,10 +70,11 @@ static int pic_dispatch_post_load(void *opaque, int version_id)
 static void pic_common_realize(DeviceState *dev, Error **errp)
 {
     PICCommonState *s = PIC_COMMON(dev);
 static void pic_common_realize(DeviceState *dev, Error **errp)
 {
     PICCommonState *s = PIC_COMMON(dev);

+    ISADevice *isa = ISA_DEVICE(dev);

 
 

-    isa_register_ioport(NULL, &s->base_io, s->iobase);
+    isa_register_ioport(isa, &s->base_io, s->iobase);

     if (s->elcr_addr != -1) {
     if (s->elcr_addr != -1) {

-        isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr);
+        isa_register_ioport(isa, &s->elcr_io, s->elcr_addr);

     }
 
     qdev_set_legacy_instance_id(dev, s->iobase, 1);
     }
 
     qdev_set_legacy_instance_id(dev, s->iobase, 1);


@@ -98,7 +100,6 @@ static const VMStateDescription vmstate_pic_common = {
     .name = "i8259",
     .version_id = 1,
     .minimum_version_id = 1,
     .name = "i8259",
     .version_id = 1,
     .minimum_version_id = 1,

-    .minimum_version_id_old = 1,

     .pre_save = pic_dispatch_pre_save,
     .post_load = pic_dispatch_post_load,
     .fields = (VMStateField[]) {
     .pre_save = pic_dispatch_pre_save,
     .post_load = pic_dispatch_post_load,
     .fields = (VMStateField[]) {


@@ -123,9 +124,9 @@ static const VMStateDescription vmstate_pic_common = {
 };
 
 static Property pic_properties_common[] = {
 };
 
 static Property pic_properties_common[] = {

-    DEFINE_PROP_HEX32("iobase", PICCommonState, iobase,  -1),
-    DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr,  -1),
-    DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask,  -1),
+    DEFINE_PROP_UINT32("iobase", PICCommonState, iobase,  -1),
+    DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr,  -1),
+    DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask,  -1),

     DEFINE_PROP_BIT("master", PICCommonState, master,  0, false),
     DEFINE_PROP_END_OF_LIST(),
 };
     DEFINE_PROP_BIT("master", PICCommonState, master,  0, false),
     DEFINE_PROP_END_OF_LIST(),
 };


@@ -135,9 +136,15 @@ static void pic_common_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->vmsd = &vmstate_pic_common;
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->vmsd = &vmstate_pic_common;

-    dc->no_user = 1;

     dc->props = pic_properties_common;
     dc->realize = pic_common_realize;
     dc->props = pic_properties_common;
     dc->realize = pic_common_realize;

+    /*
+     * Reason: unlike ordinary ISA devices, the PICs need additional
+     * wiring: its IRQ input lines are set up by board code, and the
+     * wiring of the slave to the master is hard-coded in device model
+     * code.
+     */
+    dc->user_creatable = false;

 }
 
 static const TypeInfo pic_common_type = {
 }
 
 static const TypeInfo pic_common_type = {