+/*
+ * QEMU float support
+ *
+ * Derived from SoftFloat.
+ */
/*============================================================================
}
#endif
+/*----------------------------------------------------------------------------
+| Returns the fraction bits of the half-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+INLINE uint32_t extractFloat16Frac(float16 a)
+{
+ return float16_val(a) & 0x3ff;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the exponent bits of the half-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+INLINE int16 extractFloat16Exp(float16 a)
+{
+ return (float16_val(a) >> 10) & 0x1f;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the sign bit of the single-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+INLINE flag extractFloat16Sign(float16 a)
+{
+ return float16_val(a)>>15;
+}
+
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/
-static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM)
+static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
if ( zSign ) z = - z;
if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
float_raise( float_flag_invalid STATUS_VAR);
- return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;
return z;
| returned.
*----------------------------------------------------------------------------*/
-static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM)
+static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven, increment;
roundingMode = STATUS(float_rounding_mode);
roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) absZ1 < 0 );
+ increment = ( (int64_t) absZ1 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
if ( increment ) {
++absZ0;
if ( absZ0 == 0 ) goto overflow;
- absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );
+ absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
}
z = absZ0;
if ( zSign ) z = - z;
overflow:
float_raise( float_flag_invalid STATUS_VAR);
return
- zSign ? (sbits64) LIT64( 0x8000000000000000 )
+ zSign ? (int64_t) LIT64( 0x8000000000000000 )
: LIT64( 0x7FFFFFFFFFFFFFFF );
}
if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact;
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits32 extractFloat32Frac( float32 a )
+INLINE uint32_t extractFloat32Frac( float32 a )
{
return float32_val(a) & 0x007FFFFF;
*----------------------------------------------------------------------------*/
static void
- normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
+ normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )
{
int8 shiftCount;
| significand.
*----------------------------------------------------------------------------*/
-INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
+INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
{
return make_float32(
- ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig);
+ ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig);
}
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
+static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
}
}
roundBits = zSig & 0x7F;
- if ( 0xFD <= (bits16) zExp ) {
+ if ( 0xFD <= (uint16_t) zExp ) {
if ( ( 0xFD < zExp )
|| ( ( zExp == 0xFD )
- && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
+ && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
) {
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
*----------------------------------------------------------------------------*/
static float32
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
+ normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
{
int8 shiftCount;
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat64Frac( float64 a )
+INLINE uint64_t extractFloat64Frac( float64 a )
{
return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF );
*----------------------------------------------------------------------------*/
static void
- normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )
{
int8 shiftCount;
| significand.
*----------------------------------------------------------------------------*/
-INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
+INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
{
return make_float64(
- ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig);
+ ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
}
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
+static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
}
}
roundBits = zSig & 0x3FF;
- if ( 0x7FD <= (bits16) zExp ) {
+ if ( 0x7FD <= (uint16_t) zExp ) {
if ( ( 0x7FD < zExp )
|| ( ( zExp == 0x7FD )
- && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
+ && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
) {
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 ));
*----------------------------------------------------------------------------*/
static float64
- normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
+ normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
{
int8 shiftCount;
| value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloatx80Frac( floatx80 a )
+INLINE uint64_t extractFloatx80Frac( floatx80 a )
{
return a.low;
*----------------------------------------------------------------------------*/
static void
- normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr )
{
int8 shiftCount;
| extended double-precision floating-point value, returning the result.
*----------------------------------------------------------------------------*/
-INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
+INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig )
{
floatx80 z;
z.low = zSig;
- z.high = ( ( (bits16) zSign )<<15 ) + zExp;
+ z.high = ( ( (uint16_t) zSign )<<15 ) + zExp;
return z;
}
static floatx80
roundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1
STATUS_PARAM)
{
int8 roundingMode;
}
}
roundBits = zSig0 & roundMask;
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
if ( ( 0x7FFE < zExp )
|| ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
) {
if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR);
if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;
zSig0 += roundIncrement;
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ if ( (int64_t) zSig0 < 0 ) zExp = 1;
roundIncrement = roundMask + 1;
if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
roundMask |= roundIncrement;
if ( zSig0 == 0 ) zExp = 0;
return packFloatx80( zSign, zExp, zSig0 );
precision80:
- increment = ( (sbits64) zSig1 < 0 );
+ increment = ( (int64_t) zSig1 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
}
}
}
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
if ( ( 0x7FFE < zExp )
|| ( ( zExp == 0x7FFE )
&& ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR);
if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact;
if ( roundNearestEven ) {
- increment = ( (sbits64) zSig1 < 0 );
+ increment = ( (int64_t) zSig1 < 0 );
}
else {
if ( zSign ) {
if ( increment ) {
++zSig0;
zSig0 &=
- ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ if ( (int64_t) zSig0 < 0 ) zExp = 1;
}
return packFloatx80( zSign, zExp, zSig0 );
}
zSig0 = LIT64( 0x8000000000000000 );
}
else {
- zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
}
}
else {
static floatx80
normalizeRoundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1
STATUS_PARAM)
{
int8 shiftCount;
| floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat128Frac1( float128 a )
+INLINE uint64_t extractFloat128Frac1( float128 a )
{
return a.low;
| floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat128Frac0( float128 a )
+INLINE uint64_t extractFloat128Frac0( float128 a )
{
return a.high & LIT64( 0x0000FFFFFFFFFFFF );
static void
normalizeFloat128Subnormal(
- bits64 aSig0,
- bits64 aSig1,
+ uint64_t aSig0,
+ uint64_t aSig1,
int32 *zExpPtr,
- bits64 *zSig0Ptr,
- bits64 *zSig1Ptr
+ uint64_t *zSig0Ptr,
+ uint64_t *zSig1Ptr
)
{
int8 shiftCount;
*----------------------------------------------------------------------------*/
INLINE float128
- packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
+ packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 )
{
float128 z;
z.low = zSig1;
- z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
+ z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
return z;
}
static float128
roundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM)
+ flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven, increment, isTiny;
roundingMode = STATUS(float_rounding_mode);
roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) zSig2 < 0 );
+ increment = ( (int64_t) zSig2 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
}
}
}
- if ( 0x7FFD <= (bits32) zExp ) {
+ if ( 0x7FFD <= (uint32_t) zExp ) {
if ( ( 0x7FFD < zExp )
|| ( ( zExp == 0x7FFD )
&& eq128(
zExp = 0;
if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR);
if ( roundNearestEven ) {
- increment = ( (sbits64) zSig2 < 0 );
+ increment = ( (int64_t) zSig2 < 0 );
}
else {
if ( zSign ) {
static float128
normalizeRoundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM)
+ flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM)
{
int8 shiftCount;
- bits64 zSig2;
+ uint64_t zSig2;
if ( zSig0 == 0 ) {
zSig0 = zSig1;
flag zSign;
if ( a == 0 ) return float32_zero;
- if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
+ if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
zSign = ( a < 0 );
return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR );
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig;
+ uint64_t zSig;
if ( a == 0 ) return float64_zero;
zSign = ( a < 0 );
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig;
+ uint64_t zSig;
if ( a == 0 ) return packFloatx80( 0, 0, 0 );
zSign = ( a < 0 );
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig0;
+ uint64_t zSig0;
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
zSign = ( a < 0 );
flag zSign;
if ( a == 0 ) return float64_zero;
- if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {
+ if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) {
return packFloat64( 1, 0x43E, 0 );
}
zSign = ( a < 0 );
uint64 absA;
int8 shiftCount;
int32 zExp;
- bits64 zSig0, zSig1;
+ uint64_t zSig0, zSig1;
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
zSign = ( a < 0 );
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
+ uint32_t aSig;
+ uint64_t aSig64;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
+ uint32_t aSig;
int32 z;
a = float32_squash_input_denormal(a STATUS_VAR);
float_raise( float_flag_invalid STATUS_VAR);
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;
}
- return (sbits32) 0x80000000;
+ return (int32_t) 0x80000000;
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
}
aSig = ( aSig | 0x00800000 )<<8;
z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
+ if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
+ uint32_t aSig;
int32 z;
aSig = extractFloat32Frac( a );
return 0x7FFF;
}
}
- return (sbits32) 0xffff8000;
+ return (int32_t) 0xffff8000;
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) {
shiftCount -= 0x10;
aSig = ( aSig | 0x00800000 )<<8;
z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
+ if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) {
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64, aSigExtra;
+ uint32_t aSig;
+ uint64_t aSig64, aSigExtra;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
if ( aExp ) aSig |= 0x00800000;
aSig64 = aSig;
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
+ uint32_t aSig;
+ uint64_t aSig64;
int64 z;
a = float32_squash_input_denormal(a STATUS_VAR);
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
aSig64 = aSig | 0x00800000;
aSig64 <<= 40;
z = aSig64>>( - shiftCount );
- if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
aExp = extractFloat32Exp( a );
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a STATUS_VAR ));
+ if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloat64( aSign, 0x7FF, 0 );
}
if ( aExp == 0 ) {
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
--aExp;
}
- return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );
+ return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 );
}
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
aExp = extractFloat32Exp( a );
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a STATUS_VAR ) );
+ if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) {
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
}
aSig |= 0x00800000;
- return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );
+ return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
}
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
aExp = extractFloat32Exp( a );
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a STATUS_VAR ) );
+ if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloat128( aSign, 0x7FFF, 0, 0 );
}
if ( aExp == 0 ) {
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
--aExp;
}
- return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
+ return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
}
{
flag aSign;
int16 aExp;
- bits32 lastBitMask, roundBitsMask;
+ uint32_t lastBitMask, roundBitsMask;
int8 roundingMode;
- bits32 z;
+ uint32_t z;
a = float32_squash_input_denormal(a STATUS_VAR);
aExp = extractFloat32Exp( a );
return a;
}
if ( aExp <= 0x7E ) {
- if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a;
+ if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat32Sign( a );
switch ( STATUS(float_rounding_mode) ) {
static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat32Frac( a );
aSig |= 0x20000000;
zSig = ( aSig + bSig )<<1;
--zExp;
- if ( (sbits32) zSig < 0 ) {
+ if ( (int32_t) zSig < 0 ) {
zSig = aSig + bSig;
++zExp;
}
static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat32Frac( a );
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits32 aSig, bSig;
- bits64 zSig64;
- bits32 zSig;
+ uint32_t aSig, bSig;
+ uint64_t zSig64;
+ uint32_t zSig;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
zExp = aExp + bExp - 0x7F;
aSig = ( aSig | 0x00800000 )<<7;
bSig = ( bSig | 0x00800000 )<<8;
- shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
+ shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 );
zSig = zSig64;
- if ( 0 <= (sbits32) ( zSig<<1 ) ) {
+ if ( 0 <= (int32_t) ( zSig<<1 ) ) {
zSig <<= 1;
--zExp;
}
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
aSig >>= 1;
++zExp;
}
- zSig = ( ( (bits64) aSig )<<32 ) / bSig;
+ zSig = ( ( (uint64_t) aSig )<<32 ) / bSig;
if ( ( zSig & 0x3F ) == 0 ) {
- zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
+ zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 );
}
return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
{
flag aSign, zSign;
int16 aExp, bExp, expDiff;
- bits32 aSig, bSig;
- bits32 q;
- bits64 aSig64, bSig64, q64;
- bits32 alternateASig;
- sbits32 sigMean;
+ uint32_t aSig, bSig;
+ uint32_t q;
+ uint64_t aSig64, bSig64, q64;
+ uint32_t alternateASig;
+ int32_t sigMean;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
q = ( bSig <= aSig );
if ( q ) aSig -= bSig;
if ( 0 < expDiff ) {
- q = ( ( (bits64) aSig )<<32 ) / bSig;
+ q = ( ( (uint64_t) aSig )<<32 ) / bSig;
q >>= 32 - expDiff;
bSig >>= 2;
aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
}
else {
if ( bSig <= aSig ) aSig -= bSig;
- aSig64 = ( (bits64) aSig )<<40;
- bSig64 = ( (bits64) bSig )<<40;
+ aSig64 = ( (uint64_t) aSig )<<40;
+ bSig64 = ( (uint64_t) bSig )<<40;
expDiff -= 64;
while ( 0 < expDiff ) {
q64 = estimateDiv128To64( aSig64, 0, bSig64 );
alternateASig = aSig;
++q;
aSig -= bSig;
- } while ( 0 <= (sbits32) aSig );
+ } while ( 0 <= (int32_t) aSig );
sigMean = aSig + alternateASig;
if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
aSig = alternateASig;
}
- zSign = ( (sbits32) aSig < 0 );
+ zSign = ( (int32_t) aSig < 0 );
if ( zSign ) aSig = - aSig;
return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR );
{
flag aSign;
int16 aExp, zExp;
- bits32 aSig, zSig;
- bits64 rem, term;
+ uint32_t aSig, zSig;
+ uint64_t rem, term;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
goto roundAndPack;
}
aSig >>= aExp & 1;
- term = ( (bits64) zSig ) * zSig;
- rem = ( ( (bits64) aSig )<<32 ) - term;
- while ( (sbits64) rem < 0 ) {
+ term = ( (uint64_t) zSig ) * zSig;
+ rem = ( ( (uint64_t) aSig )<<32 ) - term;
+ while ( (int64_t) rem < 0 ) {
--zSig;
- rem += ( ( (bits64) zSig )<<1 ) | 1;
+ rem += ( ( (uint64_t) zSig )<<1 ) | 1;
}
zSig |= ( rem != 0 );
}
static const float64 float32_exp2_coefficients[15] =
{
- make_float64( 0x3ff0000000000000ll ), /* 1 */
- make_float64( 0x3fe0000000000000ll ), /* 2 */
- make_float64( 0x3fc5555555555555ll ), /* 3 */
- make_float64( 0x3fa5555555555555ll ), /* 4 */
- make_float64( 0x3f81111111111111ll ), /* 5 */
- make_float64( 0x3f56c16c16c16c17ll ), /* 6 */
- make_float64( 0x3f2a01a01a01a01all ), /* 7 */
- make_float64( 0x3efa01a01a01a01all ), /* 8 */
- make_float64( 0x3ec71de3a556c734ll ), /* 9 */
- make_float64( 0x3e927e4fb7789f5cll ), /* 10 */
- make_float64( 0x3e5ae64567f544e4ll ), /* 11 */
- make_float64( 0x3e21eed8eff8d898ll ), /* 12 */
- make_float64( 0x3de6124613a86d09ll ), /* 13 */
- make_float64( 0x3da93974a8c07c9dll ), /* 14 */
- make_float64( 0x3d6ae7f3e733b81fll ), /* 15 */
+ const_float64( 0x3ff0000000000000ll ), /* 1 */
+ const_float64( 0x3fe0000000000000ll ), /* 2 */
+ const_float64( 0x3fc5555555555555ll ), /* 3 */
+ const_float64( 0x3fa5555555555555ll ), /* 4 */
+ const_float64( 0x3f81111111111111ll ), /* 5 */
+ const_float64( 0x3f56c16c16c16c17ll ), /* 6 */
+ const_float64( 0x3f2a01a01a01a01all ), /* 7 */
+ const_float64( 0x3efa01a01a01a01all ), /* 8 */
+ const_float64( 0x3ec71de3a556c734ll ), /* 9 */
+ const_float64( 0x3e927e4fb7789f5cll ), /* 10 */
+ const_float64( 0x3e5ae64567f544e4ll ), /* 11 */
+ const_float64( 0x3e21eed8eff8d898ll ), /* 12 */
+ const_float64( 0x3de6124613a86d09ll ), /* 13 */
+ const_float64( 0x3da93974a8c07c9dll ), /* 14 */
+ const_float64( 0x3d6ae7f3e733b81fll ), /* 15 */
};
float32 float32_exp2( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
float64 r, x, xn;
int i;
a = float32_squash_input_denormal(a STATUS_VAR);
{
flag aSign, zSign;
int16 aExp;
- bits32 aSig, zSig, i;
+ uint32_t aSig, zSig, i;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
zSig = aExp << 23;
for (i = 1 << 22; i > 0; i >>= 1) {
- aSig = ( (bits64)aSig * aSig ) >> 23;
+ aSig = ( (uint64_t)aSig * aSig ) >> 23;
if ( aSig & 0x01000000 ) {
aSig >>= 1;
zSig |= i;
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The comparison is performed
+| the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float32_eq( float32 a, float32 b STATUS_PARAM )
{
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
|| ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid STATUS_VAR);
- }
+ float_raise( float_flag_invalid STATUS_VAR);
return 0;
}
- return ( float32_val(a) == float32_val(b) ) ||
- ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
-
+ av = float32_val(a);
+ bv = float32_val(b);
+ return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
}
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
-| or equal to the corresponding value `b', and 0 otherwise. The comparison
-| is performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
+| or equal to the corresponding value `b', and 0 otherwise. The invalid
+| exception is raised if either operand is a NaN. The comparison is performed
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float32_le( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. The comparison is performed according
+| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float32_lt( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| Returns 1 if the single-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. The invalid exception is raised if either
+| operand is a NaN. The comparison is performed according to the IEC/IEEE
+| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-int float32_eq_signaling( float32 a, float32 b STATUS_PARAM )
+int float32_unordered( float32 a, float32 b STATUS_PARAM )
{
- bits32 av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
|| ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
- return 0;
+ return 1;
}
- av = float32_val(a);
- bv = float32_val(b);
- return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ return 0;
+}
+
+/*----------------------------------------------------------------------------
+| Returns 1 if the single-precision floating-point value `a' is equal to
+| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
+| exception. The comparison is performed according to the IEC/IEEE Standard
+| for Binary Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float32_eq_quiet( float32 a, float32 b STATUS_PARAM )
+{
+ a = float32_squash_input_denormal(a STATUS_VAR);
+ b = float32_squash_input_denormal(b STATUS_VAR);
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
+ return 0;
+ }
+ return ( float32_val(a) == float32_val(b) ) ||
+ ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
}
/*----------------------------------------------------------------------------
int float32_le_quiet( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
int float32_lt_quiet( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the single-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
+| comparison is performed according to the IEC/IEEE Standard for Binary
+| Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float32_unordered_quiet( float32 a, float32 b STATUS_PARAM )
+{
+ a = float32_squash_input_denormal(a STATUS_VAR);
+ b = float32_squash_input_denormal(b STATUS_VAR);
+
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
+ return 1;
+ }
+ return 0;
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the 32-bit two's complement integer format. The conversion is
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
a = float64_squash_input_denormal(a STATUS_VAR);
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
aSig = extractFloat64Frac( a );
if ( ( (int16_t)z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0xffff8000 : 0x7FFF;
+ return aSign ? (int32_t) 0xffff8000 : 0x7FFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, aSigExtra;
+ uint64_t aSig, aSigExtra;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
aSigExtra = 0;
aSig <<= - shiftCount;
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
int64 z;
a = float64_squash_input_denormal(a STATUS_VAR);
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
z = aSig<<shiftCount;
}
return 0;
}
z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
{
flag aSign;
int16 aExp;
- bits64 aSig;
- bits32 zSig;
+ uint64_t aSig;
+ uint32_t zSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
aExp = extractFloat64Exp( a );
aSign = extractFloat64Sign( a );
if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a STATUS_VAR ) );
+ if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloat32( aSign, 0xFF, 0 );
}
shift64RightJamming( aSig, 22, &aSig );
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
-static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig)
+static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
{
- return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig;
+ return make_float16(
+ (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
}
/* Half precision floats come in two formats: standard IEEE and "ARM" format.
The latter gains extra exponent range by omitting the NaN/Inf encodings. */
-
-float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM )
+
+float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
- aSign = a >> 15;
- aExp = (a >> 10) & 0x1f;
- aSig = a & 0x3ff;
+ aSign = extractFloat16Sign(a);
+ aExp = extractFloat16Exp(a);
+ aSig = extractFloat16Frac(a);
if (aExp == 0x1f && ieee) {
if (aSig) {
- /* Make sure correct exceptions are raised. */
- float32ToCommonNaN(a STATUS_VAR);
- aSig |= 0x200;
+ return commonNaNToFloat32(float16ToCommonNaN(a STATUS_VAR) STATUS_VAR);
}
return packFloat32(aSign, 0xff, aSig << 13);
}
return packFloat32( aSign, aExp + 0x70, aSig << 13);
}
-bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM)
+float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
{
flag aSign;
int16 aExp;
- bits32 aSig;
- bits32 mask;
- bits32 increment;
+ uint32_t aSig;
+ uint32_t mask;
+ uint32_t increment;
int8 roundingMode;
a = float32_squash_input_denormal(a STATUS_VAR);
aSign = extractFloat32Sign( a );
if ( aExp == 0xFF ) {
if (aSig) {
- /* Make sure correct exceptions are raised. */
- float32ToCommonNaN(a STATUS_VAR);
- aSig |= 0x00400000;
+ /* Input is a NaN */
+ float16 r = commonNaNToFloat16( float32ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
+ if (!ieee) {
+ return packFloat16(aSign, 0, 0);
+ }
+ return r;
+ }
+ /* Infinity */
+ if (!ieee) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return packFloat16(aSign, 0x1f, 0x3ff);
}
- return packFloat16(aSign, 0x1f, aSig >> 13);
+ return packFloat16(aSign, 0x1f, 0);
}
- if (aExp == 0 && aSign == 0) {
+ if (aExp == 0 && aSig == 0) {
return packFloat16(aSign, 0, 0);
}
/* Decimal point between bits 22 and 23. */
aSig |= 0x00800000;
aExp -= 0x7f;
if (aExp < -14) {
- mask = 0x007fffff;
- if (aExp < -24) {
- aExp = -25;
- } else {
- mask >>= 24 + aExp;
+ mask = 0x00ffffff;
+ if (aExp >= -24) {
+ mask >>= 25 + aExp;
}
} else {
mask = 0x00001fff;
}
} else {
if (aExp > 16) {
- float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
+ float_raise(float_flag_invalid | float_flag_inexact STATUS_VAR);
return packFloat16(aSign, 0x1f, 0x3ff);
}
}
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
aExp = extractFloat64Exp( a );
aSign = extractFloat64Sign( a );
if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a STATUS_VAR ) );
+ if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) {
{
flag aSign;
int16 aExp;
- bits64 aSig, zSig0, zSig1;
+ uint64_t aSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
aExp = extractFloat64Exp( a );
aSign = extractFloat64Sign( a );
if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a STATUS_VAR ) );
+ if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
return packFloat128( aSign, 0x7FFF, 0, 0 );
}
if ( aExp == 0 ) {
{
flag aSign;
int16 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
- bits64 z;
+ uint64_t z;
a = float64_squash_input_denormal(a STATUS_VAR);
aExp = extractFloat64Exp( a );
return a;
}
if ( aExp < 0x3FF ) {
- if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a;
+ if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat64Sign( a );
switch ( STATUS(float_rounding_mode) ) {
static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
+ uint64_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat64Frac( a );
aSig |= LIT64( 0x2000000000000000 );
zSig = ( aSig + bSig )<<1;
--zExp;
- if ( (sbits64) zSig < 0 ) {
+ if ( (int64_t) zSig < 0 ) {
zSig = aSig + bSig;
++zExp;
}
static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
+ uint64_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat64Frac( a );
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
mul64To128( aSig, bSig, &zSig0, &zSig1 );
zSig0 |= ( zSig1 != 0 );
- if ( 0 <= (sbits64) ( zSig0<<1 ) ) {
+ if ( 0 <= (int64_t) ( zSig0<<1 ) ) {
zSig0 <<= 1;
--zExp;
}
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
- bits64 rem0, rem1;
- bits64 term0, term1;
+ uint64_t aSig, bSig, zSig;
+ uint64_t rem0, rem1;
+ uint64_t term0, term1;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
if ( ( zSig & 0x1FF ) <= 2 ) {
mul64To128( bSig, zSig, &term0, &term1 );
sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig;
add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
}
{
flag aSign, zSign;
int16 aExp, bExp, expDiff;
- bits64 aSig, bSig;
- bits64 q, alternateASig;
- sbits64 sigMean;
+ uint64_t aSig, bSig;
+ uint64_t q, alternateASig;
+ int64_t sigMean;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
alternateASig = aSig;
++q;
aSig -= bSig;
- } while ( 0 <= (sbits64) aSig );
+ } while ( 0 <= (int64_t) aSig );
sigMean = aSig + alternateASig;
if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
aSig = alternateASig;
}
- zSign = ( (sbits64) aSig < 0 );
+ zSign = ( (int64_t) aSig < 0 );
if ( zSign ) aSig = - aSig;
return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR );
{
flag aSign;
int16 aExp, zExp;
- bits64 aSig, zSig, doubleZSig;
- bits64 rem0, rem1, term0, term1;
+ uint64_t aSig, zSig, doubleZSig;
+ uint64_t rem0, rem1, term0, term1;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
doubleZSig = zSig<<1;
mul64To128( zSig, zSig, &term0, &term1 );
sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig;
doubleZSig -= 2;
add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
{
flag aSign, zSign;
int16 aExp;
- bits64 aSig, aSig0, aSig1, zSig, i;
+ uint64_t aSig, aSig0, aSig1, zSig, i;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
aExp -= 0x3FF;
aSig |= LIT64( 0x0010000000000000 );
zSign = aExp < 0;
- zSig = (bits64)aExp << 52;
+ zSig = (uint64_t)aExp << 52;
for (i = 1LL << 51; i > 0; i >>= 1) {
mul64To128( aSig, aSig, &aSig0, &aSig1 );
aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
-| corresponding value `b', and 0 otherwise. The comparison is performed
+| corresponding value `b', and 0 otherwise. The invalid exception is raised
+| if either operand is a NaN. Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_eq( float64 a, float64 b STATUS_PARAM )
{
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid STATUS_VAR);
- }
+ float_raise( float_flag_invalid STATUS_VAR);
return 0;
}
av = float64_val(a);
bv = float64_val(b);
- return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
-| equal to the corresponding value `b', and 0 otherwise. The comparison is
-| performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
+| equal to the corresponding value `b', and 0 otherwise. The invalid
+| exception is raised if either operand is a NaN. The comparison is performed
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_le( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. The comparison is performed according
+| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float64_lt( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is equal to the
-| corresponding value `b', and 0 otherwise. The invalid exception is raised
-| if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| Returns 1 if the double-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. The invalid exception is raised if either
+| operand is a NaN. The comparison is performed according to the IEC/IEEE
+| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-int float64_eq_signaling( float64 a, float64 b STATUS_PARAM )
+int float64_unordered( float64 a, float64 b STATUS_PARAM )
{
- bits64 av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
+ return 1;
+ }
+ return 0;
+}
+
+/*----------------------------------------------------------------------------
+| Returns 1 if the double-precision floating-point value `a' is equal to the
+| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
+| exception.The comparison is performed according to the IEC/IEEE Standard
+| for Binary Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float64_eq_quiet( float64 a, float64 b STATUS_PARAM )
+{
+ uint64_t av, bv;
+ a = float64_squash_input_denormal(a STATUS_VAR);
+ b = float64_squash_input_denormal(b STATUS_VAR);
+
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
return 0;
}
av = float64_val(a);
bv = float64_val(b);
- return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
int float64_le_quiet( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
int float64_lt_quiet( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the double-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
+| comparison is performed according to the IEC/IEEE Standard for Binary
+| Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float64_unordered_quiet( float64 a, float64 b STATUS_PARAM )
+{
+ a = float64_squash_input_denormal(a STATUS_VAR);
+ b = float64_squash_input_denormal(b STATUS_VAR);
+
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
+ return 1;
+ }
+ return 0;
+}
+
#ifdef FLOATX80
/*----------------------------------------------------------------------------
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
shiftCount = 0x4037 - aExp;
if ( shiftCount <= 0 ) shiftCount = 1;
shift64RightJamming( aSig, shiftCount, &aSig );
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( 0x401E < aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
goto invalid;
}
else if ( aExp < 0x3FFF ) {
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig, aSigExtra;
+ uint64_t aSig, aSigExtra;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
aSigExtra = 0;
}
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
int64 z;
aSig = extractFloatx80Frac( a );
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
else if ( aExp < 0x3FFF ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
return 0;
}
z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
{
flag aSign;
int32 aExp;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) );
+ if ( (uint64_t) ( aSig<<1 ) ) {
+ return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
return packFloat32( aSign, 0xFF, 0 );
}
{
flag aSign;
int32 aExp;
- bits64 aSig, zSig;
+ uint64_t aSig, zSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) );
+ if ( (uint64_t) ( aSig<<1 ) ) {
+ return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
return packFloat64( aSign, 0x7FF, 0 );
}
{
flag aSign;
int16 aExp;
- bits64 aSig, zSig0, zSig1;
+ uint64_t aSig, zSig0, zSig1;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) );
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) {
+ return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
return packFloat128( aSign, aExp, zSig0, zSig1 );
{
flag aSign;
int32 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
floatx80 z;
aExp = extractFloatx80Exp( a );
if ( 0x403E <= aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) {
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) {
return propagateFloatx80NaN( a, a STATUS_VAR );
}
return a;
}
if ( aExp < 0x3FFF ) {
if ( ( aExp == 0 )
- && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
+ && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
return a;
}
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloatx80Sign( a );
switch ( STATUS(float_rounding_mode) ) {
case float_round_nearest_even:
- if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 )
+ if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
) {
return
packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
int32 expDiff;
aSig = extractFloatx80Frac( a );
expDiff = aExp - bExp;
if ( 0 < expDiff ) {
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return a;
}
if ( bExp == 0 ) --expDiff;
}
else if ( expDiff < 0 ) {
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) ++expDiff;
}
else {
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
return a;
goto shiftRight1;
}
zSig0 = aSig + bSig;
- if ( (sbits64) zSig0 < 0 ) goto roundAndPack;
+ if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
shiftRight1:
shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
zSig0 |= LIT64( 0x8000000000000000 );
static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM )
{
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
int32 expDiff;
floatx80 z;
if ( 0 < expDiff ) goto aExpBigger;
if ( expDiff < 0 ) goto bExpBigger;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0 );
bExpBigger:
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) ++expDiff;
goto normalizeRoundAndPack;
aExpBigger:
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return a;
}
if ( bExp == 0 ) --expDiff;
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
floatx80 z;
aSig = extractFloatx80Frac( a );
bSign = extractFloatx80Sign( b );
zSign = aSign ^ bSign;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ if ( (uint64_t) ( aSig<<1 )
+ || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
if ( ( bExp | bSig ) == 0 ) goto invalid;
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
if ( ( aExp | aSig ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
}
zExp = aExp + bExp - 0x3FFE;
mul64To128( aSig, bSig, &zSig0, &zSig1 );
- if ( 0 < (sbits64) zSig0 ) {
+ if ( 0 < (int64_t) zSig0 ) {
shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
--zExp;
}
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- bits64 rem0, rem1, rem2, term0, term1, term2;
+ uint64_t aSig, bSig, zSig0, zSig1;
+ uint64_t rem0, rem1, rem2, term0, term1, term2;
floatx80 z;
aSig = extractFloatx80Frac( a );
bSign = extractFloatx80Sign( b );
zSign = aSign ^ bSign;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
goto invalid;
}
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return packFloatx80( zSign, 0, 0 );
}
if ( bExp == 0 ) {
zSig0 = estimateDiv128To64( aSig, rem1, bSig );
mul64To128( bSig, zSig0, &term0, &term1 );
sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
}
zSig1 = estimateDiv128To64( rem1, 0, bSig );
- if ( (bits64) ( zSig1<<1 ) <= 8 ) {
+ if ( (uint64_t) ( zSig1<<1 ) <= 8 ) {
mul64To128( bSig, zSig1, &term1, &term2 );
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
}
{
flag aSign, zSign;
int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig;
- bits64 q, term0, term1, alternateASig0, alternateASig1;
+ uint64_t aSig0, aSig1, bSig;
+ uint64_t q, term0, term1, alternateASig0, alternateASig1;
floatx80 z;
aSig0 = extractFloatx80Frac( a );
bSig = extractFloatx80Frac( b );
bExp = extractFloatx80Exp( b );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ if ( (uint64_t) ( aSig0<<1 )
+ || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
goto invalid;
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR );
return a;
}
if ( bExp == 0 ) {
normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
}
if ( aExp == 0 ) {
- if ( (bits64) ( aSig0<<1 ) == 0 ) return a;
+ if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
}
bSig |= LIT64( 0x8000000000000000 );
{
flag aSign;
int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
floatx80 z;
aSig0 = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR );
+ if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR );
if ( ! aSign ) return a;
goto invalid;
}
doubleZSig0 = zSig0<<1;
mul64To128( zSig0, zSig0, &term0, &term1 );
sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
doubleZSig0 -= 2;
add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
mul64To128( zSig1, zSig1, &term2, &term3 );
sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
shortShift128Left( 0, zSig1, 1, &term2, &term3 );
term3 |= 1;
}
/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is
-| equal to the corresponding value `b', and 0 otherwise. The comparison is
-| performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
+| Returns 1 if the extended double-precision floating-point value `a' is equal
+| to the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. Otherwise, the comparison is performed
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM )
{
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
- if ( floatx80_is_signaling_nan( a )
- || floatx80_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid STATUS_VAR);
- }
+ float_raise( float_flag_invalid STATUS_VAR);
return 0;
}
return
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
| less than or equal to the corresponding value `b', and 0 otherwise. The
-| comparison is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
+| invalid exception is raised if either operand is a NaN. The comparison is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic.
*----------------------------------------------------------------------------*/
int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
return 0;
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
== 0 );
}
return
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
-| less than the corresponding value `b', and 0 otherwise. The comparison
-| is performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
+| less than the corresponding value `b', and 0 otherwise. The invalid
+| exception is raised if either operand is a NaN. The comparison is performed
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
return 0;
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
!= 0 );
}
return
}
/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is equal
-| to the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| Returns 1 if the extended double-precision floating-point values `a' and `b'
+| cannot be compared, and 0 otherwise. The invalid exception is raised if
+| either operand is a NaN. The comparison is performed according to the
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
+int floatx80_unordered( floatx80 a, floatx80 b STATUS_PARAM )
+{
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ return 1;
+ }
+ return 0;
+}
-int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM )
+/*----------------------------------------------------------------------------
+| Returns 1 if the extended double-precision floating-point value `a' is
+| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
+| cause an exception. The comparison is performed according to the IEC/IEEE
+| Standard for Binary Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int floatx80_eq_quiet( floatx80 a, floatx80 b STATUS_PARAM )
{
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
- float_raise( float_flag_invalid STATUS_VAR);
+ if ( floatx80_is_signaling_nan( a )
+ || floatx80_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
return 0;
}
return
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
== 0 );
}
return
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
!= 0 );
}
return
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the extended double-precision floating-point values `a' and `b'
+| cannot be compared, and 0 otherwise. Quiet NaNs do not cause an exception.
+| The comparison is performed according to the IEC/IEEE Standard for Binary
+| Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+int floatx80_unordered_quiet( floatx80 a, floatx80 b STATUS_PARAM )
+{
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ if ( floatx80_is_signaling_nan( a )
+ || floatx80_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
+ return 1;
+ }
+ return 0;
+}
+
#endif
#ifdef FLOAT128
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1, savedASig;
+ uint64_t aSig0, aSig1, savedASig;
int32 z;
aSig1 = extractFloat128Frac1( a );
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig0<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
}
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
int64 z;
aSig1 = extractFloat128Frac1( a );
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
- if ( (bits64) ( aSig1<<shiftCount ) ) {
+ if ( (uint64_t) ( aSig1<<shiftCount ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
}
z = aSig0>>( - shiftCount );
if ( aSig1
- || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) {
+ || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
- bits32 zSig;
+ uint64_t aSig0, aSig1;
+ uint32_t zSig;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
aSign = extractFloat128Sign( a );
if ( aExp == 0x7FFF ) {
if ( aSig0 | aSig1 ) {
- return commonNaNToFloat32( float128ToCommonNaN( a STATUS_VAR ) );
+ return commonNaNToFloat32( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
return packFloat32( aSign, 0xFF, 0 );
}
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
aSign = extractFloat128Sign( a );
if ( aExp == 0x7FFF ) {
if ( aSig0 | aSig1 ) {
- return commonNaNToFloat64( float128ToCommonNaN( a STATUS_VAR ) );
+ return commonNaNToFloat64( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
return packFloat64( aSign, 0x7FF, 0 );
}
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
aSign = extractFloat128Sign( a );
if ( aExp == 0x7FFF ) {
if ( aSig0 | aSig1 ) {
- return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR ) );
+ return commonNaNToFloatx80( float128ToCommonNaN( a STATUS_VAR ) STATUS_VAR );
}
return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
{
flag aSign;
int32 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
float128 z;
if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
}
else {
- if ( (sbits64) z.low < 0 ) {
+ if ( (int64_t) z.low < 0 ) {
++z.high;
- if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;
+ if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1;
}
}
}
}
else {
if ( aExp < 0x3FFF ) {
- if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
+ if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat128Sign( a );
switch ( STATUS(float_rounding_mode) ) {
static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
int32 expDiff;
aSig1 = extractFloat128Frac1( a );
static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
int32 expDiff;
float128 z;
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
float128 z;
aSig1 = extractFloat128Frac1( a );
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
float128 z;
aSig1 = extractFloat128Frac1( a );
zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
}
if ( ( zSig1 & 0x3FFF ) <= 4 ) {
mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
}
{
flag aSign, zSign;
int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
- bits64 allZero, alternateASig0, alternateASig1, sigMean1;
- sbits64 sigMean0;
+ uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
+ uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
+ int64_t sigMean0;
float128 z;
aSig1 = extractFloat128Frac1( a );
alternateASig1 = aSig1;
++q;
sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- } while ( 0 <= (sbits64) aSig0 );
+ } while ( 0 <= (int64_t) aSig0 );
add128(
- aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 );
+ aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 );
if ( ( sigMean0 < 0 )
|| ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
aSig0 = alternateASig0;
aSig1 = alternateASig1;
}
- zSign = ( (sbits64) aSig0 < 0 );
+ zSign = ( (int64_t) aSig0 < 0 );
if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
return
normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 STATUS_VAR );
{
flag aSign;
int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
float128 z;
aSig1 = extractFloat128Frac1( a );
doubleZSig0 = zSig0<<1;
mul64To128( zSig0, zSig0, &term0, &term1 );
sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
doubleZSig0 -= 2;
add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
mul64To128( zSig1, zSig1, &term2, &term3 );
sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
shortShift128Left( 0, zSig1, 1, &term2, &term3 );
term3 |= 1;
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The comparison is performed
+| the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
|| ( ( extractFloat128Exp( b ) == 0x7FFF )
&& ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
) {
- if ( float128_is_signaling_nan( a )
- || float128_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid STATUS_VAR);
- }
+ float_raise( float_flag_invalid STATUS_VAR);
return 0;
}
return
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| or equal to the corresponding value `b', and 0 otherwise. The comparison
-| is performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
+| or equal to the corresponding value `b', and 0 otherwise. The invalid
+| exception is raised if either operand is a NaN. The comparison is performed
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float128_le( float128 a, float128 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
== 0 );
}
return
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| the corresponding value `b', and 0 otherwise. The invalid exception is
+| raised if either operand is a NaN. The comparison is performed according
+| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
int float128_lt( float128 a, float128 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
!= 0 );
}
return
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. The invalid exception is raised if either
+| operand is a NaN. The comparison is performed according to the IEC/IEEE
+| Standard for Binary Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float128_unordered( float128 a, float128 b STATUS_PARAM )
+{
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ return 1;
+ }
+ return 0;
+}
+
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
+| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
+| exception. The comparison is performed according to the IEC/IEEE Standard
+| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-int float128_eq_signaling( float128 a, float128 b STATUS_PARAM )
+int float128_eq_quiet( float128 a, float128 b STATUS_PARAM )
{
if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
|| ( ( extractFloat128Exp( b ) == 0x7FFF )
&& ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
) {
- float_raise( float_flag_invalid STATUS_VAR);
+ if ( float128_is_signaling_nan( a )
+ || float128_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
return 0;
}
return
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
== 0 );
}
return
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
!= 0 );
}
return
}
+/*----------------------------------------------------------------------------
+| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
+| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
+| comparison is performed according to the IEC/IEEE Standard for Binary
+| Floating-Point Arithmetic.
+*----------------------------------------------------------------------------*/
+
+int float128_unordered_quiet( float128 a, float128 b STATUS_PARAM )
+{
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ if ( float128_is_signaling_nan( a )
+ || float128_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid STATUS_VAR);
+ }
+ return 1;
+ }
+ return 0;
+}
+
#endif
/* misc functions */
int is_quiet STATUS_PARAM ) \
{ \
flag aSign, bSign; \
- bits ## s av, bv; \
+ uint ## s ## _t av, bv; \
a = float ## s ## _squash_input_denormal(a STATUS_VAR); \
b = float ## s ## _squash_input_denormal(b STATUS_VAR); \
\
av = float ## s ## _val(a); \
bv = float ## s ## _val(b); \
if ( aSign != bSign ) { \
- if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \
+ if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \
/* zero case */ \
return float_relation_equal; \
} else { \
return float128_compare_internal(a, b, 1 STATUS_VAR);
}
+/* min() and max() functions. These can't be implemented as
+ * 'compare and pick one input' because that would mishandle
+ * NaNs and +0 vs -0.
+ */
+#define MINMAX(s, nan_exp) \
+INLINE float ## s float ## s ## _minmax(float ## s a, float ## s b, \
+ int ismin STATUS_PARAM ) \
+{ \
+ flag aSign, bSign; \
+ uint ## s ## _t av, bv; \
+ a = float ## s ## _squash_input_denormal(a STATUS_VAR); \
+ b = float ## s ## _squash_input_denormal(b STATUS_VAR); \
+ if (float ## s ## _is_any_nan(a) || \
+ float ## s ## _is_any_nan(b)) { \
+ return propagateFloat ## s ## NaN(a, b STATUS_VAR); \
+ } \
+ aSign = extractFloat ## s ## Sign(a); \
+ bSign = extractFloat ## s ## Sign(b); \
+ av = float ## s ## _val(a); \
+ bv = float ## s ## _val(b); \
+ if (aSign != bSign) { \
+ if (ismin) { \
+ return aSign ? a : b; \
+ } else { \
+ return aSign ? b : a; \
+ } \
+ } else { \
+ if (ismin) { \
+ return (aSign ^ (av < bv)) ? a : b; \
+ } else { \
+ return (aSign ^ (av < bv)) ? b : a; \
+ } \
+ } \
+} \
+ \
+float ## s float ## s ## _min(float ## s a, float ## s b STATUS_PARAM) \
+{ \
+ return float ## s ## _minmax(a, b, 1 STATUS_VAR); \
+} \
+ \
+float ## s float ## s ## _max(float ## s a, float ## s b STATUS_PARAM) \
+{ \
+ return float ## s ## _minmax(a, b, 0 STATUS_VAR); \
+}
+
+MINMAX(32, 0xff)
+MINMAX(64, 0x7ff)
+
+
/* Multiply A by 2 raised to the power N. */
float32 float32_scalbn( float32 a, int n STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
projects / qemu.git / blobdiff