tcg-ppc64: Merge ppc32 shifts

[qemu.git] / tcg / ppc / tcg-target.h

diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index ea2676958141400242e941d308838af9015cfd8d..05069ae2d80cd579353854bf39ebd8be9bc28945 100644 (file)
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -24,8 +24,8 @@
 #ifndef TCG_TARGET_PPC 
 #define TCG_TARGET_PPC 1
 
-#define TCG_TARGET_WORDS_BIGENDIAN
 #define TCG_TARGET_NB_REGS 32
+#define TCG_TARGET_INSN_UNIT_SIZE 4
 
 typedef enum {
     TCG_REG_R0 = 0,
@@ -78,6 +78,7 @@ typedef enum {
 
 /* optional instructions */
 #define TCG_TARGET_HAS_div_i32          1
+#define TCG_TARGET_HAS_rem_i32          0
 #define TCG_TARGET_HAS_rot_i32          1
 #define TCG_TARGET_HAS_ext8s_i32        1
 #define TCG_TARGET_HAS_ext16s_i32       1
@@ -94,11 +95,15 @@ typedef enum {
 #define TCG_TARGET_HAS_nor_i32          1
 #define TCG_TARGET_HAS_deposit_i32      1
 #define TCG_TARGET_HAS_movcond_i32      1
+#define TCG_TARGET_HAS_mulu2_i32        1
+#define TCG_TARGET_HAS_muls2_i32        0
+#define TCG_TARGET_HAS_muluh_i32        0
+#define TCG_TARGET_HAS_mulsh_i32        0
 
 #define TCG_AREG0 TCG_REG_R27
 
 #define tcg_qemu_tb_exec(env, tb_ptr) \
-    ((long __attribute__ ((longcall)) \
-      (*)(void *, void *))code_gen_prologue)(env, tb_ptr)
+    ((uintptr_t __attribute__ ((longcall)) \
+      (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 
 #endif