NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
-void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
- int mmu_idx, uintptr_t retaddr)
+void tlb_fill(CPUState *cs, target_ulong addr, int size,
+ MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
{
- int ret = s390_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
+ int ret = s390_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
if (unlikely(ret != 0)) {
cpu_loop_exit_restore(cs, retaddr);
}
int wordsize, uintptr_t ra)
{
if (v % wordsize) {
- CPUState *cs = CPU(s390_env_get_cpu(env));
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_SPECIFICATION, 6);
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
}
}
/* Bits 32-55 must contain all 0. */
if (env->regs[0] & 0xffffff00u) {
- cpu_restore_state(ENV_GET_CPU(env), ra);
- program_interrupt(env, PGM_SPECIFICATION, 6);
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
}
str = get_address(env, r2);
/* Bits 32-47 of R0 must be zero. */
if (env->regs[0] & 0xffff0000u) {
- cpu_restore_state(ENV_GET_CPU(env), ra);
- program_interrupt(env, PGM_SPECIFICATION, 6);
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
}
str = get_address(env, r2);
uintptr_t ra = GETPC();
int i;
+ if (a2 & 0x3) {
+ /* we either came here by lam or lamy, which have different lengths */
+ s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
env->aregs[i] = cpu_ldl_data_ra(env, a2, ra);
a2 += 4;
uintptr_t ra = GETPC();
int i;
+ if (a2 & 0x3) {
+ s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
cpu_stl_data_ra(env, a2, env->aregs[i], ra);
a2 += 4;
/* Sanity check writability of the store address. */
#ifndef CONFIG_USER_ONLY
- probe_write(env, a2, mem_idx, ra);
+ probe_write(env, a2, 0, mem_idx, ra);
#endif
/* Note that the compare-and-swap is atomic, and the store is atomic, but
return cc;
spec_exception:
- cpu_restore_state(ENV_GET_CPU(env), ra);
- program_interrupt(env, PGM_SPECIFICATION, 6);
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
g_assert_not_reached();
}
uint64_t src = a2;
uint32_t i;
+ if (src & 0x7) {
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
uint64_t val = cpu_ldq_data_ra(env, src, ra);
if (env->cregs[i] != val && i >= 9 && i <= 11) {
uint64_t src = a2;
uint32_t i;
+ if (src & 0x3) {
+ s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
uint32_t val = cpu_ldl_data_ra(env, src, ra);
if ((uint32_t)env->cregs[i] != val && i >= 9 && i <= 11) {
uint64_t dest = a2;
uint32_t i;
+ if (dest & 0x7) {
+ s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
cpu_stq_data_ra(env, dest, env->cregs[i], ra);
dest += sizeof(uint64_t);
uint64_t dest = a2;
uint32_t i;
+ if (dest & 0x3) {
+ s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra);
+ }
+
for (i = r1;; i = (i + 1) % 16) {
cpu_stl_data_ra(env, dest, env->cregs[i], ra);
dest += sizeof(uint32_t);
return 0;
}
-uint32_t HELPER(tprot)(uint64_t a1, uint64_t a2)
+uint32_t HELPER(tprot)(CPUS390XState *env, uint64_t a1, uint64_t a2)
{
- /* XXX implement */
- return 0;
+ S390CPU *cpu = s390_env_get_cpu(env);
+ CPUState *cs = CPU(cpu);
+
+ /*
+ * TODO: we currently don't handle all access protection types
+ * (including access-list and key-controlled) as well as AR mode.
+ */
+ if (!s390_cpu_virt_mem_check_write(cpu, a1, 0, 1)) {
+ /* Fetching permitted; storing permitted */
+ return 0;
+ }
+
+ if (env->int_pgm_code == PGM_PROTECTION) {
+ /* retry if reading is possible */
+ cs->exception_index = 0;
+ if (!s390_cpu_virt_mem_check_read(cpu, a1, 0, 1)) {
+ /* Fetching permitted; storing not permitted */
+ return 1;
+ }
+ }
+
+ switch (env->int_pgm_code) {
+ case PGM_PROTECTION:
+ /* Fetching not permitted; storing not permitted */
+ cs->exception_index = 0;
+ return 2;
+ case PGM_ADDRESSING:
+ case PGM_TRANS_SPEC:
+ /* exceptions forwarded to the guest */
+ s390_cpu_virt_mem_handle_exc(cpu, GETPC());
+ return 0;
+ }
+
+ /* Translation not available */
+ cs->exception_index = 0;
+ return 3;
}
/* insert storage key extended */
uint16_t entries, i, index = 0;
if (r2 & 0xff000) {
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_SPECIFICATION, 4);
+ s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra);
}
if (!(r2 & 0x800)) {
/* invalidation-and-clearing operation */
- table = r1 & _ASCE_ORIGIN;
+ table = r1 & ASCE_ORIGIN;
entries = (r2 & 0x7ff) + 1;
- switch (r1 & _ASCE_TYPE_MASK) {
- case _ASCE_TYPE_REGION1:
+ switch (r1 & ASCE_TYPE_MASK) {
+ case ASCE_TYPE_REGION1:
index = (r2 >> 53) & 0x7ff;
break;
- case _ASCE_TYPE_REGION2:
+ case ASCE_TYPE_REGION2:
index = (r2 >> 42) & 0x7ff;
break;
- case _ASCE_TYPE_REGION3:
+ case ASCE_TYPE_REGION3:
index = (r2 >> 31) & 0x7ff;
break;
- case _ASCE_TYPE_SEGMENT:
+ case ASCE_TYPE_SEGMENT:
index = (r2 >> 20) & 0x7ff;
break;
}
/* addresses are not wrapped in 24/31bit mode but table index is */
raddr = table + ((index + i) & 0x7ff) * sizeof(entry);
entry = cpu_ldq_real_ra(env, raddr, ra);
- if (!(entry & _REGION_ENTRY_INV)) {
+ if (!(entry & REGION_ENTRY_INV)) {
/* we are allowed to not store if already invalid */
- entry |= _REGION_ENTRY_INV;
+ entry |= REGION_ENTRY_INV;
cpu_stq_real_ra(env, raddr, entry, ra);
}
}
uint64_t pte_addr, pte;
/* Compute the page table entry address */
- pte_addr = (pto & _SEGMENT_ENTRY_ORIGIN);
+ pte_addr = (pto & SEGMENT_ENTRY_ORIGIN);
pte_addr += (vaddr & VADDR_PX) >> 9;
/* Mark the page table entry as invalid */
pte = cpu_ldq_real_ra(env, pte_addr, ra);
- pte |= _PAGE_INVALID;
+ pte |= PAGE_INVALID;
cpu_stq_real_ra(env, pte_addr, pte, ra);
/* XXX we exploit the fact that Linux passes the exact virtual
/* XXX incomplete - has more corner cases */
if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) {
- cpu_restore_state(cs, GETPC());
- program_interrupt(env, PGM_SPECIAL_OP, 2);
+ s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC());
}
old_exc = cs->exception_index;
const uint8_t psw_as = (env->psw.mask & PSW_MASK_ASC) >> PSW_SHIFT_ASC;
const uint64_t r0 = env->regs[0];
const uintptr_t ra = GETPC();
- CPUState *cs = CPU(s390_env_get_cpu(env));
uint8_t dest_key, dest_as, dest_k, dest_a;
uint8_t src_key, src_as, src_k, src_a;
uint64_t val;
__func__, dest, src, len);
if (!(env->psw.mask & PSW_MASK_DAT)) {
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_SPECIAL_OP, 6);
+ s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra);
}
/* OAC (operand access control) for the first operand -> dest */
}
if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) {
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_SPECIAL_OP, 6);
+ s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra);
}
if (!(env->cregs[0] & CR0_SECONDARY) &&
(dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) {
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_SPECIAL_OP, 6);
+ s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra);
}
if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) {
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_PRIVILEGED, 6);
+ s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra);
}
len = wrap_length(env, len);
(env->psw.mask & PSW_MASK_PSTATE)) {
qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n",
__func__);
- cpu_restore_state(cs, ra);
- program_interrupt(env, PGM_ADDRESSING, 6);
+ s390_program_interrupt(env, PGM_ADDRESSING, 6, ra);
}
/* FIXME: a) LAP
projects / qemu.git / blobdiff