typedef struct dma_pagetable_entry {
int32_t frame;
int32_t owner;
-} __attribute__((packed)) dma_pagetable_entry;
+} QEMU_PACKED dma_pagetable_entry;
#define DMA_PAGESIZE 4096
#define DMA_REG_ENABLE 1
if (s->cache_ltag == 0x80000001 && s->cache_bmask == 0xf0f0f0f) {
target_phys_addr_t dest = s->cache_ptag & ~0x1;
dest += (s->cache_maint & 0x3) << 3;
- cpu_physical_memory_rw(dest, (uint8_t*)&val, 4, 1);
+ cpu_physical_memory_write(dest, &val, 4);
}
break;
/* Remote Speed Registers */
entry_addr = s->dma_tl_base + index * sizeof(dma_pagetable_entry);
/* XXX: not sure. should we really use only lowest bits? */
entry_addr &= 0x7fffffff;
- cpu_physical_memory_rw(entry_addr, (uint8_t *)&entry, sizeof(entry), 0);
+ cpu_physical_memory_read(entry_addr, &entry, sizeof(entry));
/* Read/write data at right place */
phys_addr = entry.frame + (addr & (DMA_PAGESIZE - 1));
struct rc4030DMAState *p;
int i;
- s = (rc4030_dma *)qemu_mallocz(sizeof(rc4030_dma) * n);
- p = (struct rc4030DMAState *)qemu_mallocz(sizeof(struct rc4030DMAState) * n);
+ s = (rc4030_dma *)g_malloc0(sizeof(rc4030_dma) * n);
+ p = (struct rc4030DMAState *)g_malloc0(sizeof(struct rc4030DMAState) * n);
for (i = 0; i < n; i++) {
p->opaque = opaque;
p->n = i;
rc4030State *s;
int s_chipset, s_jazzio;
- s = qemu_mallocz(sizeof(rc4030State));
+ s = g_malloc0(sizeof(rc4030State));
*irqs = qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16);
*dmas = rc4030_allocate_dmas(s, 4);