*
* Copyright (c) 2007 CodeSourcery.
*
- * This code is licenced under the GPL
+ * This code is licensed under the GPL
*/
#include "hw.h"
#include "mcf.h"
m5206_timer_state *s;
QEMUBH *bh;
- s = (m5206_timer_state *)qemu_mallocz(sizeof(m5206_timer_state));
+ s = (m5206_timer_state *)g_malloc0(sizeof(m5206_timer_state));
bh = qemu_bh_new(m5206_timer_trigger, s);
s->timer = ptimer_init(bh);
s->irq = irq;
m5206_mbar_write(s, offset, value);
}
-static CPUReadMemoryFunc *m5206_mbar_readfn[] = {
+static CPUReadMemoryFunc * const m5206_mbar_readfn[] = {
m5206_mbar_readb,
m5206_mbar_readw,
m5206_mbar_readl
};
-static CPUWriteMemoryFunc *m5206_mbar_writefn[] = {
+static CPUWriteMemoryFunc * const m5206_mbar_writefn[] = {
m5206_mbar_writeb,
m5206_mbar_writew,
m5206_mbar_writel
qemu_irq *pic;
int iomemtype;
- s = (m5206_mbar_state *)qemu_mallocz(sizeof(m5206_mbar_state));
- iomemtype = cpu_register_io_memory(0, m5206_mbar_readfn,
- m5206_mbar_writefn, s);
+ s = (m5206_mbar_state *)g_malloc0(sizeof(m5206_mbar_state));
+ iomemtype = cpu_register_io_memory(m5206_mbar_readfn,
+ m5206_mbar_writefn, s,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
pic = qemu_allocate_irqs(m5206_mbar_set_irq, s, 14);