typedef struct IRQMP {
SysBusDevice busdev;
+ MemoryRegion iomem;
void *set_pil_in;
void *set_pil_in_opaque;
}
}
-static uint32_t grlib_irqmp_readl(void *opaque, target_phys_addr_t addr)
+static uint64_t grlib_irqmp_read(void *opaque, hwaddr addr,
+ unsigned size)
{
IRQMP *irqmp = opaque;
IRQMPState *state;
return state->extended[cpu];
}
- trace_grlib_irqmp_unknown_register("read", addr);
+ trace_grlib_irqmp_readl_unknown(addr);
return 0;
}
-static void
-grlib_irqmp_writel(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void grlib_irqmp_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
{
IRQMP *irqmp = opaque;
IRQMPState *state;
return;
}
- trace_grlib_irqmp_unknown_register("write", addr);
+ trace_grlib_irqmp_writel_unknown(addr, value);
}
-static CPUReadMemoryFunc * const grlib_irqmp_read[] = {
- NULL, NULL, &grlib_irqmp_readl,
-};
-
-static CPUWriteMemoryFunc * const grlib_irqmp_write[] = {
- NULL, NULL, &grlib_irqmp_writel,
+static const MemoryRegionOps grlib_irqmp_ops = {
+ .read = grlib_irqmp_read,
+ .write = grlib_irqmp_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
};
static void grlib_irqmp_reset(DeviceState *d)
static int grlib_irqmp_init(SysBusDevice *dev)
{
IRQMP *irqmp = FROM_SYSBUS(typeof(*irqmp), dev);
- int irqmp_regs;
assert(irqmp != NULL);
return -1;
}
- irqmp_regs = cpu_register_io_memory(grlib_irqmp_read,
- grlib_irqmp_write,
- irqmp, DEVICE_NATIVE_ENDIAN);
-
- irqmp->state = qemu_mallocz(sizeof *irqmp->state);
+ memory_region_init_io(&irqmp->iomem, &grlib_irqmp_ops, irqmp,
+ "irqmp", IRQMP_REG_SIZE);
- if (irqmp_regs < 0) {
- return -1;
- }
+ irqmp->state = g_malloc0(sizeof *irqmp->state);
- sysbus_init_mmio(dev, IRQMP_REG_SIZE, irqmp_regs);
+ sysbus_init_mmio(dev, &irqmp->iomem);
return 0;
}
-static SysBusDeviceInfo grlib_irqmp_info = {
- .init = grlib_irqmp_init,
- .qdev.name = "grlib,irqmp",
- .qdev.reset = grlib_irqmp_reset,
- .qdev.size = sizeof(IRQMP),
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in),
- DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property grlib_irqmp_properties[] = {
+ DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in),
+ DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = grlib_irqmp_init;
+ dc->reset = grlib_irqmp_reset;
+ dc->props = grlib_irqmp_properties;
+}
+
+static TypeInfo grlib_irqmp_info = {
+ .name = "grlib,irqmp",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IRQMP),
+ .class_init = grlib_irqmp_class_init,
};
-static void grlib_irqmp_register(void)
+static void grlib_irqmp_register_types(void)
{
- sysbus_register_withprop(&grlib_irqmp_info);
+ type_register_static(&grlib_irqmp_info);
}
-device_init(grlib_irqmp_register)
+type_init(grlib_irqmp_register_types)