};
/* Interrupt Controller */
-typedef struct {
- SysBusDevice busdev;
+
+#define TYPE_STRONGARM_PIC "strongarm_pic"
+#define STRONGARM_PIC(obj) \
+ OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC)
+
+typedef struct StrongARMPICState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
qemu_irq irq;
qemu_irq fiq;
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static int strongarm_pic_initfn(SysBusDevice *dev)
+static int strongarm_pic_initfn(SysBusDevice *sbd)
{
- StrongARMPICState *s = FROM_SYSBUS(StrongARMPICState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ StrongARMPICState *s = STRONGARM_PIC(dev);
- qdev_init_gpio_in(&dev->qdev, strongarm_pic_set_irq, SA_PIC_SRCS);
- memory_region_init_io(&s->iomem, &strongarm_pic_ops, s, "pic", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
- sysbus_init_irq(dev, &s->irq);
- sysbus_init_irq(dev, &s->fiq);
+ qdev_init_gpio_in(dev, strongarm_pic_set_irq, SA_PIC_SRCS);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_pic_ops, s,
+ "pic", 0x1000);
+ sysbus_init_mmio(sbd, &s->iomem);
+ sysbus_init_irq(sbd, &s->irq);
+ sysbus_init_irq(sbd, &s->fiq);
return 0;
}
}
static const TypeInfo strongarm_pic_info = {
- .name = "strongarm_pic",
+ .name = TYPE_STRONGARM_PIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMPICState),
.class_init = strongarm_pic_class_init,
* trim delete isn't emulated, so
* f = 32 768 / (RTTR_trim + 1) */
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_STRONGARM_RTC "strongarm-rtc"
+#define STRONGARM_RTC(obj) \
+ OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC)
+
+typedef struct StrongARMRTCState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
uint32_t rttr;
uint32_t rtsr;
static int strongarm_rtc_init(SysBusDevice *dev)
{
- StrongARMRTCState *s = FROM_SYSBUS(StrongARMRTCState, dev);
+ StrongARMRTCState *s = STRONGARM_RTC(dev);
struct tm tm;
s->rttr = 0x0;
sysbus_init_irq(dev, &s->rtc_irq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
- memory_region_init_io(&s->iomem, &strongarm_rtc_ops, s, "rtc", 0x10000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_rtc_ops, s,
+ "rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
static const TypeInfo strongarm_rtc_sysbus_info = {
- .name = "strongarm-rtc",
+ .name = TYPE_STRONGARM_RTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMRTCState),
.class_init = strongarm_rtc_sysbus_class_init,
#define GEDR 0x18
#define GAFR 0x1c
+#define TYPE_STRONGARM_GPIO "strongarm-gpio"
+#define STRONGARM_GPIO(obj) \
+ OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO)
+
typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
struct StrongARMGPIOInfo {
SysBusDevice busdev;
DeviceState *dev;
int i;
- dev = qdev_create(NULL, "strongarm-gpio");
+ dev = qdev_create(NULL, TYPE_STRONGARM_GPIO);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
-static int strongarm_gpio_initfn(SysBusDevice *dev)
+static int strongarm_gpio_initfn(SysBusDevice *sbd)
{
- StrongARMGPIOInfo *s;
+ DeviceState *dev = DEVICE(sbd);
+ StrongARMGPIOInfo *s = STRONGARM_GPIO(dev);
int i;
- s = FROM_SYSBUS(StrongARMGPIOInfo, dev);
-
- qdev_init_gpio_in(&dev->qdev, strongarm_gpio_set, 28);
- qdev_init_gpio_out(&dev->qdev, s->handler, 28);
+ qdev_init_gpio_in(dev, strongarm_gpio_set, 28);
+ qdev_init_gpio_out(dev, s->handler, 28);
- memory_region_init_io(&s->iomem, &strongarm_gpio_ops, s, "gpio", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_gpio_ops, s,
+ "gpio", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
+ sysbus_init_mmio(sbd, &s->iomem);
for (i = 0; i < 11; i++) {
- sysbus_init_irq(dev, &s->irqs[i]);
+ sysbus_init_irq(sbd, &s->irqs[i]);
}
- sysbus_init_irq(dev, &s->irqX);
+ sysbus_init_irq(sbd, &s->irqX);
return 0;
}
}
static const TypeInfo strongarm_gpio_info = {
- .name = "strongarm-gpio",
+ .name = TYPE_STRONGARM_GPIO,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMGPIOInfo),
.class_init = strongarm_gpio_class_init,
#define PSDR 0x0c
#define PPFR 0x10
+#define TYPE_STRONGARM_PPC "strongarm-ppc"
+#define STRONGARM_PPC(obj) \
+ OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC)
+
typedef struct StrongARMPPCInfo StrongARMPPCInfo;
struct StrongARMPPCInfo {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
qemu_irq handler[28];
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static int strongarm_ppc_init(SysBusDevice *dev)
+static int strongarm_ppc_init(SysBusDevice *sbd)
{
- StrongARMPPCInfo *s;
-
- s = FROM_SYSBUS(StrongARMPPCInfo, dev);
+ DeviceState *dev = DEVICE(sbd);
+ StrongARMPPCInfo *s = STRONGARM_PPC(dev);
- qdev_init_gpio_in(&dev->qdev, strongarm_ppc_set, 22);
- qdev_init_gpio_out(&dev->qdev, s->handler, 22);
+ qdev_init_gpio_in(dev, strongarm_ppc_set, 22);
+ qdev_init_gpio_out(dev, s->handler, 22);
- memory_region_init_io(&s->iomem, &strongarm_ppc_ops, s, "ppc", 0x1000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_ppc_ops, s,
+ "ppc", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
+ sysbus_init_mmio(sbd, &s->iomem);
return 0;
}
}
static const TypeInfo strongarm_ppc_info = {
- .name = "strongarm-ppc",
+ .name = TYPE_STRONGARM_PPC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMPPCInfo),
.class_init = strongarm_ppc_class_init,
#define RX_FIFO_FRE (1 << 9)
#define RX_FIFO_ROR (1 << 10)
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_STRONGARM_UART "strongarm-uart"
+#define STRONGARM_UART(obj) \
+ OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART)
+
+typedef struct StrongARMUARTState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
CharDriverState *chr;
qemu_irq irq;
static int strongarm_uart_init(SysBusDevice *dev)
{
- StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev);
+ StrongARMUARTState *s = STRONGARM_UART(dev);
- memory_region_init_io(&s->iomem, &strongarm_uart_ops, s, "uart", 0x10000);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_uart_ops, s,
+ "uart", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
static void strongarm_uart_reset(DeviceState *dev)
{
- StrongARMUARTState *s = DO_UPCAST(StrongARMUARTState, busdev.qdev, dev);
+ StrongARMUARTState *s = STRONGARM_UART(dev);
s->utcr0 = UTCR0_DSS; /* 8 data, no parity */
s->brd = 23; /* 9600 */
}
static const TypeInfo strongarm_uart_info = {
- .name = "strongarm-uart",
+ .name = TYPE_STRONGARM_UART,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMUARTState),
.class_init = strongarm_uart_class_init,
};
/* Synchronous Serial Ports */
-typedef struct {
- SysBusDevice busdev;
+
+#define TYPE_STRONGARM_SSP "strongarm-ssp"
+#define STRONGARM_SSP(obj) \
+ OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP)
+
+typedef struct StrongARMSSPState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
qemu_irq irq;
SSIBus *bus;
return 0;
}
-static int strongarm_ssp_init(SysBusDevice *dev)
+static int strongarm_ssp_init(SysBusDevice *sbd)
{
- StrongARMSSPState *s = FROM_SYSBUS(StrongARMSSPState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ StrongARMSSPState *s = STRONGARM_SSP(dev);
- sysbus_init_irq(dev, &s->irq);
+ sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, &strongarm_ssp_ops, s, "ssp", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
+ memory_region_init_io(&s->iomem, OBJECT(s), &strongarm_ssp_ops, s,
+ "ssp", 0x1000);
+ sysbus_init_mmio(sbd, &s->iomem);
- s->bus = ssi_create_bus(&dev->qdev, "ssi");
+ s->bus = ssi_create_bus(dev, "ssi");
return 0;
}
static void strongarm_ssp_reset(DeviceState *dev)
{
- StrongARMSSPState *s = DO_UPCAST(StrongARMSSPState, busdev.qdev, dev);
+ StrongARMSSPState *s = STRONGARM_SSP(dev);
+
s->sssr = 0x03; /* 3 bit data, SPI, disabled */
s->rx_start = 0;
s->rx_level = 0;
}
static const TypeInfo strongarm_ssp_info = {
- .name = "strongarm-ssp",
+ .name = TYPE_STRONGARM_SSP,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMSSPState),
.class_init = strongarm_ssp_class_init,
exit(1);
}
- memory_region_init_ram(&s->sdram, "strongarm.sdram", sdram_size);
+ memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
qdev_get_gpio_in(s->pic, SA_PIC_OSTC3),
NULL);
- sysbus_create_simple("strongarm-rtc", 0x90010000,
+ sysbus_create_simple(TYPE_STRONGARM_RTC, 0x90010000,
qdev_get_gpio_in(s->pic, SA_PIC_RTC_ALARM));
s->gpio = strongarm_gpio_init(0x90040000, s->pic);
- s->ppc = sysbus_create_varargs("strongarm-ppc", 0x90060000, NULL);
+ s->ppc = sysbus_create_varargs(TYPE_STRONGARM_PPC, 0x90060000, NULL);
for (i = 0; sa_serial[i].io_base; i++) {
- DeviceState *dev = qdev_create(NULL, "strongarm-uart");
+ DeviceState *dev = qdev_create(NULL, TYPE_STRONGARM_UART);
qdev_prop_set_chr(dev, "chardev", serial_hds[i]);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
qdev_get_gpio_in(s->pic, sa_serial[i].irq));
}
- s->ssp = sysbus_create_varargs("strongarm-ssp", 0x80070000,
+ s->ssp = sysbus_create_varargs(TYPE_STRONGARM_SSP, 0x80070000,
qdev_get_gpio_in(s->pic, SA_PIC_SSP), NULL);
s->ssp_bus = (SSIBus *)qdev_get_child_bus(s->ssp, "ssi");
projects / qemu.git / blobdiff