update_irl(fpga);
}
-static uint32_t r2d_fpga_read(void *opaque, target_phys_addr_t addr)
+static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
{
r2d_fpga_t *s = opaque;
}
static void
-r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
{
r2d_fpga_t *s = opaque;
};
static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
- target_phys_addr_t base, qemu_irq irl)
+ hwaddr base, qemu_irq irl)
{
r2d_fpga_t *s;