#include "cpu.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
#include "exec/helper-proto.h"
#include "qemu/qemu-print.h"
void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val)
{
+ static const uint8_t rm_map[] = {
+ [FPCR_DYN_NORMAL >> FPCR_DYN_SHIFT] = float_round_nearest_even,
+ [FPCR_DYN_CHOPPED >> FPCR_DYN_SHIFT] = float_round_to_zero,
+ [FPCR_DYN_MINUS >> FPCR_DYN_SHIFT] = float_round_down,
+ [FPCR_DYN_PLUS >> FPCR_DYN_SHIFT] = float_round_up,
+ };
+
uint32_t fpcr = val >> 32;
uint32_t t = 0;
+ /* Record the raw value before adjusting for linux-user. */
+ env->fpcr = fpcr;
+
+#ifdef CONFIG_USER_ONLY
+ /*
+ * Override some of these bits with the contents of ENV->SWCR.
+ * In system mode, some of these would trap to the kernel, at
+ * which point the kernel's handler would emulate and apply
+ * the software exception mask.
+ */
+ uint32_t soft_fpcr = alpha_ieee_swcr_to_fpcr(env->swcr) >> 32;
+ fpcr |= soft_fpcr & (FPCR_STATUS_MASK | FPCR_DNZ);
+#endif
+
t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);
t |= CONVERT_BIT(fpcr, FPCR_UNFD, FPCR_UNF);
t |= CONVERT_BIT(fpcr, FPCR_OVFD, FPCR_OVF);
t |= CONVERT_BIT(fpcr, FPCR_DZED, FPCR_DZE);
t |= CONVERT_BIT(fpcr, FPCR_INVD, FPCR_INV);
- env->fpcr = fpcr;
env->fpcr_exc_enable = ~t & FPCR_STATUS_MASK;
- switch (fpcr & FPCR_DYN_MASK) {
- case FPCR_DYN_NORMAL:
- default:
- t = float_round_nearest_even;
- break;
- case FPCR_DYN_CHOPPED:
- t = float_round_to_zero;
- break;
- case FPCR_DYN_MINUS:
- t = float_round_down;
- break;
- case FPCR_DYN_PLUS:
- t = float_round_up;
- break;
- }
- env->fpcr_dyn_round = t;
+ env->fpcr_dyn_round = rm_map[(fpcr & FPCR_DYN_MASK) >> FPCR_DYN_SHIFT];
env->fpcr_flush_to_zero = (fpcr & FPCR_UNFD) && (fpcr & FPCR_UNDZ);
env->fp_status.flush_inputs_to_zero = (fpcr & FPCR_DNZ) != 0;
-
#ifdef CONFIG_USER_ONLY
- /*
- * Override some of these bits with the contents of ENV->SWCR.
- * In system mode, some of these would trap to the kernel, at
- * which point the kernel's handler would emulate and apply
- * the software exception mask.
- */
- if (env->swcr & SWCR_MAP_DMZ) {
- env->fp_status.flush_inputs_to_zero = 1;
- }
if (env->swcr & SWCR_MAP_UMZ) {
- env->fp_status.flush_to_zero = 1;
+ env->fpcr_flush_to_zero = 1;
}
- env->fpcr_exc_enable &= ~(alpha_ieee_swcr_to_fpcr(env->swcr) >> 32);
#endif
}
int prot_need, int mmu_idx,
target_ulong *pphys, int *pprot)
{
- CPUState *cs = CPU(alpha_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
target_long saddr = addr;
target_ulong phys = 0;
target_ulong L1pte, L2pte, L3pte;
cs->exception_index = EXCP_MMFAULT;
env->trap_arg0 = addr;
env->trap_arg1 = fail;
- env->trap_arg2 = (access_type == MMU_INST_FETCH ? -1 : access_type);
+ env->trap_arg2 = (access_type == MMU_DATA_LOAD ? 0ull :
+ access_type == MMU_DATA_STORE ? 1ull :
+ /* access_type == MMU_INST_FETCH */ -1ull);
cpu_loop_exit_restore(cs, retaddr);
}
We expect that ENV->PC has already been updated. */
void QEMU_NORETURN helper_excp(CPUAlphaState *env, int excp, int error)
{
- AlphaCPU *cpu = alpha_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
cs->exception_index = excp;
env->error_code = error;
void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
int excp, int error)
{
- AlphaCPU *cpu = alpha_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
+ CPUState *cs = env_cpu(env);
cs->exception_index = excp;
env->error_code = error;