} QEMU_PACKED;
typedef struct NvdimmNfitMemDev NvdimmNfitMemDev;
+#define ACPI_NFIT_MEM_NOT_ARMED (1 << 3)
+
/*
* NVDIMM Control Region Structure
*
nvdimm_build_structure_spa(GArray *structures, DeviceState *dev)
{
NvdimmNfitSpa *nfit_spa;
- uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP,
- NULL);
- uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
- NULL);
- uint32_t node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP,
- NULL);
+ uint64_t addr = object_property_get_uint(OBJECT(dev), PC_DIMM_ADDR_PROP,
+ NULL);
+ uint64_t size = object_property_get_uint(OBJECT(dev), PC_DIMM_SIZE_PROP,
+ NULL);
+ uint32_t node = object_property_get_uint(OBJECT(dev), PC_DIMM_NODE_PROP,
+ NULL);
int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
- NULL);
+ NULL);
nfit_spa = acpi_data_push(structures, sizeof(*nfit_spa));
nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev)
{
NvdimmNfitMemDev *nfit_memdev;
- uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
- NULL);
+ NVDIMMDevice *nvdimm = NVDIMM(OBJECT(dev));
+ uint64_t size = object_property_get_uint(OBJECT(dev), PC_DIMM_SIZE_PROP,
+ NULL);
int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
NULL);
uint32_t handle = nvdimm_slot_to_handle(slot);
/* Only one interleave for PMEM. */
nfit_memdev->interleave_ways = cpu_to_le16(1);
+
+ if (nvdimm->unarmed) {
+ nfit_memdev->flags |= cpu_to_le16(ACPI_NFIT_MEM_NOT_ARMED);
+ }
}
/*