slavio_misc_update_irq(s);
}
-static void slavio_cfg_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void slavio_cfg_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
slavio_misc_update_irq(s);
}
-static uint64_t slavio_cfg_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_cfg_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
},
};
-static void slavio_diag_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void slavio_diag_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
s->diag = val & 0xff;
}
-static uint64_t slavio_diag_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_diag_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
},
};
-static void slavio_mdm_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void slavio_mdm_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
s->mctrl = val & 0xff;
}
-static uint64_t slavio_mdm_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_mdm_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
},
};
-static void slavio_aux1_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void slavio_aux1_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
s->aux1 = val & 0xff;
}
-static uint64_t slavio_aux1_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_aux1_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
},
};
-static void slavio_aux2_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void slavio_aux2_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
slavio_misc_update_irq(s);
}
-static uint64_t slavio_aux2_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_aux2_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
},
};
-static void apc_mem_writeb(void *opaque, target_phys_addr_t addr,
+static void apc_mem_writeb(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
APCState *s = opaque;
qemu_irq_raise(s->cpu_halt);
}
-static uint64_t apc_mem_readb(void *opaque, target_phys_addr_t addr,
+static uint64_t apc_mem_readb(void *opaque, hwaddr addr,
unsigned size)
{
uint32_t ret = 0;
}
};
-static uint64_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_sysctrl_mem_readl(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
return ret;
}
-static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr,
+static void slavio_sysctrl_mem_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;
},
};
-static uint64_t slavio_led_mem_readw(void *opaque, target_phys_addr_t addr,
+static uint64_t slavio_led_mem_readw(void *opaque, hwaddr addr,
unsigned size)
{
MiscState *s = opaque;
return ret;
}
-static void slavio_led_mem_writew(void *opaque, target_phys_addr_t addr,
+static void slavio_led_mem_writew(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MiscState *s = opaque;