* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/empty_slot.h"
#include "hw/loader.h"
#include "elf.h"
-#include "sysemu/block-backend.h"
#include "trace.h"
-#include "qemu/cutils.h"
/*
* Sun4m architecture was used in the following machines:
#define KERNEL_LOAD_ADDR 0x00004000
#define CMDLINE_ADDR 0x007ff000
#define INITRD_LOAD_ADDR 0x00800000
-#define PROM_SIZE_MAX (1024 * 1024)
+#define PROM_SIZE_MAX (1 * MiB)
#define PROM_VADDR 0xffd00000
#define PROM_FILENAME "openbios-sparc32"
#define CFG_ADDR 0xd00000510ULL
uint8_t nvram_machine_id;
};
-void DMA_init(ISABus *bus, int high_page_enable)
-{
-}
-
static void fw_cfg_boot_set(void *opaque, const char *boot_device,
Error **errp)
{
}
if (initrd_size > 0) {
for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) {
- ptr = rom_ptr(KERNEL_LOAD_ADDR + i);
- if (ldl_p(ptr) == 0x48647253) { // HdrS
+ ptr = rom_ptr(KERNEL_LOAD_ADDR + i, 24);
+ if (ptr && ldl_p(ptr) == 0x48647253) { /* HdrS */
stl_p(ptr + 16, INITRD_LOAD_ADDR);
stl_p(ptr + 20, initrd_size);
break;
MemoryRegion mem;
} IDRegState;
-static void idreg_init1(Object *obj)
+static void idreg_realize(DeviceState *ds, Error **errp)
{
- IDRegState *s = MACIO_ID_REGISTER(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
+ IDRegState *s = MACIO_ID_REGISTER(ds);
+ SysBusDevice *dev = SYS_BUS_DEVICE(ds);
+ Error *local_err = NULL;
+
+ memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.idreg",
+ sizeof(idreg_data), &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
- memory_region_init_ram_nomigrate(&s->mem, obj,
- "sun4m.idreg", sizeof(idreg_data), &error_fatal);
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
}
+static void idreg_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ dc->realize = idreg_realize;
+}
+
static const TypeInfo idreg_info = {
.name = TYPE_MACIO_ID_REGISTER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IDRegState),
- .instance_init = idreg_init1,
+ .class_init = idreg_class_init,
};
#define TYPE_TCX_AFX "tcx_afx"
sysbus_mmio_map(s, 0, addr);
}
-static void afx_init1(Object *obj)
+static void afx_realize(DeviceState *ds, Error **errp)
{
- AFXState *s = TCX_AFX(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
+ AFXState *s = TCX_AFX(ds);
+ SysBusDevice *dev = SYS_BUS_DEVICE(ds);
+ Error *local_err = NULL;
+
+ memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.afx", 4,
+ &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
- memory_region_init_ram_nomigrate(&s->mem, obj, "sun4m.afx", 4, &error_fatal);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
}
+static void afx_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ dc->realize = afx_realize;
+}
+
static const TypeInfo afx_info = {
.name = TYPE_TCX_AFX,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(AFXState),
- .instance_init = afx_init1,
+ .class_init = afx_class_init,
};
#define TYPE_OPENPROM "openprom"
}
}
-static void prom_init1(Object *obj)
+static void prom_realize(DeviceState *ds, Error **errp)
{
- PROMState *s = OPENPROM(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
+ PROMState *s = OPENPROM(ds);
+ SysBusDevice *dev = SYS_BUS_DEVICE(ds);
+ Error *local_err = NULL;
+
+ memory_region_init_ram_nomigrate(&s->prom, OBJECT(ds), "sun4m.prom",
+ PROM_SIZE_MAX, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
- memory_region_init_ram_nomigrate(&s->prom, obj, "sun4m.prom", PROM_SIZE_MAX,
- &error_fatal);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = prom_properties;
+ dc->realize = prom_realize;
}
static const TypeInfo prom_info = {
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PROMState),
.class_init = prom_class_init,
- .instance_init = prom_init1,
};
#define TYPE_SUN4M_MEMORY "memory"
/* allocate RAM */
if ((uint64_t)RAM_size > max_mem) {
- error_report("Too much memory for this machine: %d, maximum %d",
- (unsigned int)(RAM_size / (1024 * 1024)),
- (unsigned int)(max_mem / (1024 * 1024)));
+ error_report("Too much memory for this machine: %" PRId64 ","
+ " maximum %" PRId64,
+ RAM_size / MiB, max_mem / MiB);
exit(1);
}
dev = qdev_create(NULL, "memory");
qdev_prop_set_uint32(dev, "disabled", 0);
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
- qdev_prop_set_chr(dev, "chrB", serial_hds[1]);
- qdev_prop_set_chr(dev, "chrA", serial_hds[0]);
+ qdev_prop_set_chr(dev, "chrB", serial_hd(1));
+ qdev_prop_set_chr(dev, "chrA", serial_hd(0));
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
qdev_init_nofail(dev);