* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include <time.h>
-#include <sys/time.h>
-#include "hw.h"
+
+#include "sysbus.h"
#include "net.h"
#include "flash.h"
-#include "sysemu.h"
-#include "devices.h"
#include "boards.h"
-
+#include "sysemu.h"
#include "etraxfs.h"
+#include "loader.h"
+#include "elf.h"
+#include "cris-boot.h"
#define D(x)
#define DNAND(x)
struct nand_state_t
{
- struct nand_flash_s *nand;
+ NANDFlashState *nand;
unsigned int rdy:1;
unsigned int ale:1;
unsigned int cle:1;
s->rdy = rdy;
}
-static CPUReadMemoryFunc *nand_read[] = {
+static CPUReadMemoryFunc * const nand_read[] = {
&nand_readl,
&nand_readl,
&nand_readl,
};
-static CPUWriteMemoryFunc *nand_write[] = {
+static CPUWriteMemoryFunc * const nand_write[] = {
&nand_writel,
&nand_writel,
&nand_writel,
};
-#define RW_PA_DOUT 0
-#define R_PA_DIN 1
-#define RW_PA_OE 2
-struct gpio_state_t
+
+struct tempsensor_t
+{
+ unsigned int shiftreg;
+ unsigned int count;
+ enum {
+ ST_OUT, ST_IN, ST_Z
+ } state;
+
+ uint16_t regs[3];
+};
+
+static void tempsensor_clkedge(struct tempsensor_t *s,
+ unsigned int clk, unsigned int data_in)
+{
+ D(printf("%s clk=%d state=%d sr=%x\n", __func__,
+ clk, s->state, s->shiftreg));
+ if (s->count == 0) {
+ s->count = 16;
+ s->state = ST_OUT;
+ }
+ switch (s->state) {
+ case ST_OUT:
+ /* Output reg is clocked at negedge. */
+ if (!clk) {
+ s->count--;
+ s->shiftreg <<= 1;
+ if (s->count == 0) {
+ s->shiftreg = 0;
+ s->state = ST_IN;
+ s->count = 16;
+ }
+ }
+ break;
+ case ST_Z:
+ if (clk) {
+ s->count--;
+ if (s->count == 0) {
+ s->shiftreg = 0;
+ s->state = ST_OUT;
+ s->count = 16;
+ }
+ }
+ break;
+ case ST_IN:
+ /* Indata is sampled at posedge. */
+ if (clk) {
+ s->count--;
+ s->shiftreg <<= 1;
+ s->shiftreg |= data_in & 1;
+ if (s->count == 0) {
+ D(printf("%s cfgreg=%x\n", __func__, s->shiftreg));
+ s->regs[0] = s->shiftreg;
+ s->state = ST_OUT;
+ s->count = 16;
+
+ if ((s->regs[0] & 0xff) == 0) {
+ /* 25 degrees celcius. */
+ s->shiftreg = 0x0b9f;
+ } else if ((s->regs[0] & 0xff) == 0xff) {
+ /* Sensor ID, 0x8100 LM70. */
+ s->shiftreg = 0x8100;
+ } else
+ printf("Invalid tempsens state %x\n", s->regs[0]);
+ }
+ }
+ break;
+ }
+}
+
+
+#define RW_PA_DOUT 0x00
+#define R_PA_DIN 0x01
+#define RW_PA_OE 0x02
+#define RW_PD_DOUT 0x10
+#define R_PD_DIN 0x11
+#define RW_PD_OE 0x12
+
+static struct gpio_state_t
{
struct nand_state_t *nand;
+ struct tempsensor_t tempsensor;
uint32_t regs[0x5c / 4];
} gpio_state;
/* Encode pins from the nand. */
r |= s->nand->rdy << 7;
break;
+ case R_PD_DIN:
+ r = s->regs[RW_PD_DOUT] & s->regs[RW_PD_OE];
+
+ /* Encode temp sensor pins. */
+ r |= (!!(s->tempsensor.shiftreg & 0x10000)) << 4;
+ break;
+
default:
r = s->regs[addr];
break;
s->regs[addr] = value;
break;
+
+ case RW_PD_DOUT:
+ /* Temp sensor clk. */
+ if ((s->regs[addr] ^ value) & 2)
+ tempsensor_clkedge(&s->tempsensor, !!(value & 2),
+ !!(value & 16));
+ s->regs[addr] = value;
+ break;
+
default:
s->regs[addr] = value;
break;
}
}
-static CPUReadMemoryFunc *gpio_read[] = {
+static CPUReadMemoryFunc * const gpio_read[] = {
NULL, NULL,
&gpio_readl,
};
-static CPUWriteMemoryFunc *gpio_write[] = {
+static CPUWriteMemoryFunc * const gpio_write[] = {
NULL, NULL,
&gpio_writel,
};
#define INTMEM_SIZE (128 * 1024)
-static uint32_t bootstrap_pc;
-static void main_cpu_reset(void *opaque)
-{
- CPUState *env = opaque;
- cpu_reset(env);
-
- env->pc = bootstrap_pc;
-}
+static struct cris_load_info li;
static
-void axisdev88_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+void axisdev88_init (ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
CPUState *env;
- struct etraxfs_pic *pic;
+ DeviceState *dev;
+ SysBusDevice *s;
+ qemu_irq irq[30], nmi[2], *cpu_irq;
void *etraxfs_dmac;
struct etraxfs_dma_client *eth[2] = {NULL, NULL};
- int kernel_size;
int i;
int nand_regs;
int gpio_regs;
cpu_model = "crisv32";
}
env = cpu_init(cpu_model);
- qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
- phys_ram = qemu_ram_alloc(ram_size);
+ phys_ram = qemu_ram_alloc(NULL, "axisdev88.ram", ram_size);
cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
- phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
+ phys_intmem = qemu_ram_alloc(NULL, "axisdev88.chipram", INTMEM_SIZE);
cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
phys_intmem | IO_MEM_RAM);
/* Attach a NAND flash to CS1. */
- nand_state.nand = nand_init(NAND_MFR_STMICRO, 0xf1);
- nand_regs = cpu_register_io_memory(0, nand_read, nand_write, &nand_state);
+ nand_state.nand = nand_init(NAND_MFR_STMICRO, 0x39);
+ nand_regs = cpu_register_io_memory(nand_read, nand_write, &nand_state,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(0x10000000, 0x05000000, nand_regs);
gpio_state.nand = &nand_state;
- gpio_regs = cpu_register_io_memory(0, gpio_read, gpio_write, &gpio_state);
- cpu_register_physical_memory(0x3001a000, 0x1c, gpio_regs);
-
+ gpio_regs = cpu_register_io_memory(gpio_read, gpio_write, &gpio_state,
+ DEVICE_NATIVE_ENDIAN);
+ cpu_register_physical_memory(0x3001a000, 0x5c, gpio_regs);
+
+
+ cpu_irq = cris_pic_init_cpu(env);
+ dev = qdev_create(NULL, "etraxfs,pic");
+ /* FIXME: Is there a proper way to signal vectors to the CPU core? */
+ qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
+ qdev_init_nofail(dev);
+ s = sysbus_from_qdev(dev);
+ sysbus_mmio_map(s, 0, 0x3001c000);
+ sysbus_connect_irq(s, 0, cpu_irq[0]);
+ sysbus_connect_irq(s, 1, cpu_irq[1]);
+ for (i = 0; i < 30; i++) {
+ irq[i] = qdev_get_gpio_in(dev, i);
+ }
+ nmi[0] = qdev_get_gpio_in(dev, 30);
+ nmi[1] = qdev_get_gpio_in(dev, 31);
- pic = etraxfs_pic_init(env, 0x3001c000);
- etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
+ etraxfs_dmac = etraxfs_dmac_init(0x30000000, 10);
for (i = 0; i < 10; i++) {
/* On ETRAX, odd numbered channels are inputs. */
- etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1);
+ etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1);
}
/* Add the two ethernet blocks. */
- eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000);
+ eth[0] = etraxfs_eth_init(&nd_table[0], 0x30034000, 1);
if (nb_nics > 1)
- eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0x30036000);
+ eth[1] = etraxfs_eth_init(&nd_table[1], 0x30036000, 2);
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
}
/* 2 timers. */
- etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);
- etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000);
+ sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
+ sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
for (i = 0; i < 4; i++) {
- if (serial_hds[i]) {
- etraxfs_ser_init(env, pic->irq + 0x14 + i,
- serial_hds[i], 0x30026000 + i * 0x2000);
- }
+ sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000,
+ irq[0x14 + i]);
}
- if (kernel_filename) {
- uint64_t entry, high;
- int kcmdline_len;
-
- /* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis
- devboard SDK. */
- kernel_size = load_elf(kernel_filename, -0x80000000LL,
- &entry, NULL, &high);
- bootstrap_pc = entry;
- if (kernel_size < 0) {
- /* Takes a kimage from the axis devboard SDK. */
- kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
- bootstrap_pc = 0x40004000;
- env->regs[9] = 0x40004000 + kernel_size;
- }
- env->regs[8] = 0x56902387; /* RAM init magic. */
-
- if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {
- if (kcmdline_len > 256) {
- fprintf(stderr, "Too long CRIS kernel cmdline (max 256)\n");
- exit(1);
- }
- pstrcpy_targphys(high, 256, kernel_cmdline);
- /* Let the kernel know we are modifying the cmdline. */
- env->regs[10] = 0x87109563;
- env->regs[11] = high;
- }
+ if (!kernel_filename) {
+ fprintf(stderr, "Kernel image must be specified\n");
+ exit(1);
}
- env->pc = bootstrap_pc;
- printf ("pc =%x\n", env->pc);
- printf ("ram size =%ld\n", ram_size);
+ li.image_filename = kernel_filename;
+ li.cmdline = kernel_cmdline;
+ cris_load_image(env, &li);
}
-QEMUMachine axisdev88_machine = {
+static QEMUMachine axisdev88_machine = {
.name = "axis-dev88",
.desc = "AXIS devboard 88",
.init = axisdev88_init,
- .ram_require = 0x8000000,
};
+
+static void axisdev88_machine_init(void)
+{
+ qemu_register_machine(&axisdev88_machine);
+}
+
+machine_init(axisdev88_machine_init);
projects / qemu.git / blobdiff