#include "qemu/bitops.h"
#include "qemu/error-report.h"
#include "qom/object.h"
-#include "trace.h"
+#include "trace-root.h"
#include "exec/memory-internal.h"
#include "exec/ram_addr.h"
AddressSpace *as;
assert(memory_region_transaction_depth);
+ assert(qemu_mutex_iothread_locked());
+
--memory_region_transaction_depth;
if (!memory_region_transaction_depth) {
if (memory_region_update_pending) {
.endianness = DEVICE_NATIVE_ENDIAN,
};
+static uint64_t memory_region_ram_device_read(void *opaque,
+ hwaddr addr, unsigned size)
+{
+ MemoryRegion *mr = opaque;
+ uint64_t data = (uint64_t)~0;
+
+ switch (size) {
+ case 1:
+ data = *(uint8_t *)(mr->ram_block->host + addr);
+ break;
+ case 2:
+ data = *(uint16_t *)(mr->ram_block->host + addr);
+ break;
+ case 4:
+ data = *(uint32_t *)(mr->ram_block->host + addr);
+ break;
+ case 8:
+ data = *(uint64_t *)(mr->ram_block->host + addr);
+ break;
+ }
+
+ trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
+
+ return data;
+}
+
+static void memory_region_ram_device_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ MemoryRegion *mr = opaque;
+
+ trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
+
+ switch (size) {
+ case 1:
+ *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
+ break;
+ case 2:
+ *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
+ break;
+ case 4:
+ *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
+ break;
+ case 8:
+ *(uint64_t *)(mr->ram_block->host + addr) = data;
+ break;
+ }
+}
+
+static const MemoryRegionOps ram_device_mem_ops = {
+ .read = memory_region_ram_device_read,
+ .write = memory_region_ram_device_write,
+ .endianness = DEVICE_HOST_ENDIAN,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .unaligned = true,
+ },
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ .unaligned = true,
+ },
+};
+
bool memory_region_access_valid(MemoryRegion *mr,
hwaddr addr,
unsigned size,
mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
}
-void memory_region_set_skip_dump(MemoryRegion *mr)
+void memory_region_init_ram_device_ptr(MemoryRegion *mr,
+ Object *owner,
+ const char *name,
+ uint64_t size,
+ void *ptr)
{
- mr->skip_dump = true;
+ memory_region_init_ram_ptr(mr, owner, name, size, ptr);
+ mr->ram_device = true;
+ mr->ops = &ram_device_mem_ops;
+ mr->opaque = mr;
}
void memory_region_init_alias(MemoryRegion *mr,
return mr->name;
}
-bool memory_region_is_skip_dump(MemoryRegion *mr)
+bool memory_region_is_ram_device(MemoryRegion *mr)
{
- return mr->skip_dump;
+ return mr->ram_device;
}
uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
void memory_region_register_iommu_notifier(MemoryRegion *mr,
IOMMUNotifier *n)
{
+ if (mr->alias) {
+ memory_region_register_iommu_notifier(mr->alias, n);
+ return;
+ }
+
/* We need to register for at least one bitfield */
assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
IOMMUNotifier *n)
{
+ if (mr->alias) {
+ memory_region_unregister_iommu_notifier(mr->alias, n);
+ return;
+ }
QLIST_REMOVE(n, node);
memory_region_update_iommu_notify_flags(mr);
}
void memory_listener_unregister(MemoryListener *listener)
{
+ if (!listener->address_space) {
+ return;
+ }
+
QTAILQ_REMOVE(&memory_listeners, listener, link);
QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
+ listener->address_space = NULL;
}
void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
call_rcu(as, do_address_space_destroy, rcu);
}
+static const char *memory_region_type(MemoryRegion *mr)
+{
+ if (memory_region_is_ram_device(mr)) {
+ return "ramd";
+ } else if (memory_region_is_romd(mr)) {
+ return "romd";
+ } else if (memory_region_is_rom(mr)) {
+ return "rom";
+ } else if (memory_region_is_ram(mr)) {
+ return "ram";
+ } else {
+ return "i/o";
+ }
+}
+
typedef struct MemoryRegionList MemoryRegionList;
struct MemoryRegionList {
typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
+#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
+ int128_sub((size), int128_one())) : 0)
+#define MTREE_INDENT " "
+
static void mtree_print_mr(fprintf_function mon_printf, void *f,
const MemoryRegion *mr, unsigned int level,
hwaddr base,
}
for (i = 0; i < level; i++) {
- mon_printf(f, " ");
+ mon_printf(f, MTREE_INDENT);
}
if (mr->alias) {
QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
}
mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
- " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
+ " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
"-" TARGET_FMT_plx "%s\n",
base + mr->addr,
- base + mr->addr
- + (int128_nz(mr->size) ?
- (hwaddr)int128_get64(int128_sub(mr->size,
- int128_one())) : 0),
+ base + mr->addr + MR_SIZE(mr->size),
mr->priority,
- mr->romd_mode ? 'R' : '-',
- !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
- : '-',
+ memory_region_type((MemoryRegion *)mr),
memory_region_name(mr),
memory_region_name(mr->alias),
mr->alias_offset,
- mr->alias_offset
- + (int128_nz(mr->size) ?
- (hwaddr)int128_get64(int128_sub(mr->size,
- int128_one())) : 0),
+ mr->alias_offset + MR_SIZE(mr->size),
mr->enabled ? "" : " [disabled]");
} else {
mon_printf(f,
- TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
+ TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
base + mr->addr,
- base + mr->addr
- + (int128_nz(mr->size) ?
- (hwaddr)int128_get64(int128_sub(mr->size,
- int128_one())) : 0),
+ base + mr->addr + MR_SIZE(mr->size),
mr->priority,
- mr->romd_mode ? 'R' : '-',
- !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
- : '-',
+ memory_region_type((MemoryRegion *)mr),
memory_region_name(mr),
mr->enabled ? "" : " [disabled]");
}
}
}
-void mtree_info(fprintf_function mon_printf, void *f)
+static void mtree_print_flatview(fprintf_function p, void *f,
+ AddressSpace *as)
+{
+ FlatView *view = address_space_get_flatview(as);
+ FlatRange *range = &view->ranges[0];
+ MemoryRegion *mr;
+ int n = view->nr;
+
+ if (n <= 0) {
+ p(f, MTREE_INDENT "No rendered FlatView for "
+ "address space '%s'\n", as->name);
+ flatview_unref(view);
+ return;
+ }
+
+ while (n--) {
+ mr = range->mr;
+ if (range->offset_in_region) {
+ p(f, MTREE_INDENT TARGET_FMT_plx "-"
+ TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
+ int128_get64(range->addr.start),
+ int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
+ mr->priority,
+ range->readonly ? "rom" : memory_region_type(mr),
+ memory_region_name(mr),
+ range->offset_in_region);
+ } else {
+ p(f, MTREE_INDENT TARGET_FMT_plx "-"
+ TARGET_FMT_plx " (prio %d, %s): %s\n",
+ int128_get64(range->addr.start),
+ int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
+ mr->priority,
+ range->readonly ? "rom" : memory_region_type(mr),
+ memory_region_name(mr));
+ }
+ range++;
+ }
+
+ flatview_unref(view);
+}
+
+void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
{
MemoryRegionListHead ml_head;
MemoryRegionList *ml, *ml2;
AddressSpace *as;
+ if (flatview) {
+ QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
+ mon_printf(f, "address-space (flat view): %s\n", as->name);
+ mtree_print_flatview(mon_printf, f, as);
+ mon_printf(f, "\n");
+ }
+ return;
+ }
+
QTAILQ_INIT(&ml_head);
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
projects / qemu.git / blobdiff