#include "firmware_abi.h"
#include "fw_cfg.h"
#include "sysbus.h"
+#include "ide.h"
+#include "loader.h"
+#include "elf.h"
//#define DEBUG_IRQ
#define NVRAM_SIZE 0x2000
#define MAX_IDE_BUS 2
#define BIOS_CFG_IOPORT 0x510
+#define FW_CFG_SPARC64_WIDTH (FW_CFG_ARCH_LOCAL + 0x00)
+#define FW_CFG_SPARC64_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01)
+#define FW_CFG_SPARC64_DEPTH (FW_CFG_ARCH_LOCAL + 0x02)
#define MAX_PILS 16
kernel_size = 0;
if (linux_boot) {
- kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL);
+ int bswap_needed;
+
+#ifdef BSWAP_NEEDED
+ bswap_needed = 1;
+#else
+ bswap_needed = 0;
+#endif
+ kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL,
+ 1, ELF_MACHINE, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR,
- RAM_size - KERNEL_LOAD_ADDR);
+ RAM_size - KERNEL_LOAD_ADDR, bswap_needed,
+ TARGET_PAGE_SIZE);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
}
}
-void qemu_system_powerdown(void)
-{
-}
-
typedef struct ResetData {
CPUState *env;
uint64_t reset_addr;
ptimer_set_limit(opaque, -limit, 0);
}
-static const int ide_iobase[2] = { 0x1f0, 0x170 };
-static const int ide_iobase2[2] = { 0x3f6, 0x376 };
-static const int ide_irq[2] = { 14, 15 };
-
-static const int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
-static const int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
-
static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
-static fdctrl_t *floppy_controller;
-
static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
uint32_t addr, uint32_t size, int type)
{
}
}
+static void dummy_isa_irq_handler(void *opaque, int n, int level)
+{
+}
+
/* EBUS (Eight bit bus) bridge */
static void
pci_ebus_init(PCIBus *bus, int devfn)
{
+ qemu_irq *isa_irq;
+
pci_create_simple(bus, devfn, "ebus");
+ isa_irq = qemu_allocate_irqs(dummy_isa_irq_handler, NULL, 16);
+ isa_bus_irqs(isa_irq);
}
-static void
+static int
pci_ebus_init1(PCIDevice *s)
{
+ isa_bus_new(&s->qdev);
+
pci_config_set_vendor_id(s->config, PCI_VENDOR_ID_SUN);
pci_config_set_device_id(s->config, PCI_DEVICE_ID_SUN_EBUS);
s->config[0x04] = 0x06; // command = bus master, pci mem
ebus_mmio_mapfunc);
pci_register_bar(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM,
ebus_mmio_mapfunc);
+ return 0;
}
static PCIDeviceInfo ebus_info = {
}
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
- ret = load_elf(filename, addr - PROM_VADDR, NULL, NULL, NULL);
+ ret = load_elf(filename, addr - PROM_VADDR, NULL, NULL, NULL,
+ 1, ELF_MACHINE, 0);
if (ret < 0 || ret > PROM_SIZE_MAX) {
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);
}
}
}
-static void prom_init1(SysBusDevice *dev)
+static int prom_init1(SysBusDevice *dev)
{
ram_addr_t prom_offset;
prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
+ return 0;
}
static SysBusDeviceInfo prom_info = {
} RamDevice;
/* System RAM */
-static void ram_init1(SysBusDevice *dev)
+static int ram_init1(SysBusDevice *dev)
{
ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
ram_offset = qemu_ram_alloc(RAM_size);
sysbus_init_mmio(dev, RAM_size, ram_offset);
+ return 0;
}
static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size)
.qdev.name = "memory",
.qdev.size = sizeof(RamDevice),
.qdev.props = (Property[]) {
- {
- .name = "size",
- .info = &qdev_prop_uint64,
- .offset = offsetof(RamDevice, size),
- },
- {/* end of property list */}
+ DEFINE_PROP_UINT64("size", RamDevice, size, 0),
+ DEFINE_PROP_END_OF_LIST(),
}
};
long initrd_size, kernel_size;
PCIBus *pci_bus, *pci_bus2, *pci_bus3;
qemu_irq *irq;
- int drive_index;
- BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
- BlockDriverState *fd[MAX_FD];
+ DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+ DriveInfo *fd[MAX_FD];
void *fw_cfg;
/* init CPUs */
}
for(; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
- serial_init(serial_io[i], NULL/*serial_irq[i]*/, 115200,
- serial_hds[i]);
+ serial_isa_init(i, serial_hds[i]);
}
}
for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
if (parallel_hds[i]) {
- parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/,
- parallel_hds[i]);
+ parallel_init(i, parallel_hds[i]);
}
}
for(i = 0; i < nb_nics; i++)
- pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
+ pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
exit(1);
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
- drive_index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS,
- i % MAX_IDE_DEVS);
- if (drive_index != -1)
- hd[i] = drives_table[drive_index].bdrv;
- else
- hd[i] = NULL;
+ hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS,
+ i % MAX_IDE_DEVS);
}
pci_cmd646_ide_init(pci_bus, hd, 1);
- /* FIXME: wire up interrupts. */
- i8042_init(NULL/*1*/, NULL/*12*/, 0x60);
+ isa_create_simple("i8042");
for(i = 0; i < MAX_FD; i++) {
- drive_index = drive_get_index(IF_FLOPPY, 0, i);
- if (drive_index != -1)
- fd[i] = drives_table[drive_index].bdrv;
- else
- fd[i] = NULL;
+ fd[i] = drive_get(IF_FLOPPY, 0, i);
}
- floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd);
- nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59);
+ fdctrl_init_isa(fd);
+ nvram = m48t59_init_isa(0x0074, NVRAM_SIZE, 59);
initrd_size = 0;
kernel_size = sun4u_load_kernel(kernel_filename, initrd_filename,
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_devices[0]);
+
+ fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_WIDTH, graphic_width);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_HEIGHT, graphic_height);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_DEPTH, graphic_depth);
+
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
projects / qemu.git / blobdiff